Datasheet

Clock Cards
7–331 GTLP EVM Board Typical Test and Setup Configuration
2.10 Clock Cards
Two clock cards (see Figure 2–17) are included with the EVM, one primary and
one spare. The clock cards generate the clock signal that is sent to every slot
via mitered lines, so that the clock arrives at exactly the same time at each
card. The clock card uses a plug-in half-can oscillator for a reference to two
CDC2586 phase-locked-loop clock drivers. These two drivers provide the
20 system clocks used on the backplane. The CDC2586 supports a maximum
frequency of 100 MHz. The clock card has one subminiature B connector
(SMB) as specified by MIL-C-39012 coaxial connector specification test point
to monitor the oscillator output.
Figure 2–17. GTLP EVM Clock Card
The clock-card board is a four-layer printed circuit board (PCB). The stackup
is signal layer, V
CC
plane, ground plane, and signal layer (see Table 2–5).