Datasheet

Backplane Board
7–319 GTLP EVM Board Typical Test and Setup Configuration
Targeted, nominal, unloaded line impedance was 50 Ω, but, based on
post-manufacturing testing, was not consistent. Results for Group 1, bits 1
through 8 are shown in Table 2–3. The backplane natural trace impedance (Z
o
)
is calculated and is a best estimate. The backplane trace impedance with only
the connector pins attached (i.e., all cards removed) (Z
o
′) and the backplane
trace impedance in a fully loaded backplane (i.e., 20 cards inserted) (Z
o
′′) are
measured.
Table 2–3. GTLP EVM Group 1, Bits 1 Through 8 Trace Impedance
Group 1 Trace D1 D2 D3 D4 D5 D6 D7 D8
Natural Trace Impedance
Z
o
(Ω) 91 47.5 47 47 48 47.5 83 47.5
t
pd
(ps/in.) 165 140 138 139 141 148 147 142
C
o
(pF/in.) 1.81 2.95 2.94 2.96 2.94 3.12 1.77 2.99
Trace Impedance With Only Connectors
Z
o
′ (Ω) 62.7 37.5 37 36.3 37.1 37.9 58.5 36.8
t
pd
′ (ps/in.) 240 177 175 180 183 185 208 183
Trace Impedance Under Full Load
Z
o
′′ (Ω) 26.6 17.7 17.9 17.5 17.9 18 24.8 17.7
t
pd
′′ (ps/in.) 564 377 362 373 377 390 493 382
Note the difference in fully loaded trace impedance between trace bit 1 and
bit 7 (D1 and D7) and the other traces. Using the lower natural trace
impedance offers the advantage of a smaller t
pd
and shorter flight time, but at
the expense of terminating with a lower-value termination resistor and the
subsequent increase in power consumption. TI offers both medium-drive
(50 mA) and high-drive (100 mA) GTLP devices that allow designers to match
the device with backplane loading. The termination resistor (R
TT
) should
match the fully loaded trace impedance (i.e., Z
o
′′) of the backplane for optimal
signal integrity.