Datasheet

SCEA017
7–285 GTLP in BTL Applications
FB+ and GTLP Characteristics Comparison
Table 1 compares the FB2033A with the high-drive GTLP2033 device, which is soon to be
released. Each characteristic is discussed in general and then in detail if the difference is
material to the use of GTLP devices in BTL/FB+ applications. Values of C
io
, I
CC
, and t
pd
are
design goals and are subject to change.
Table 1. FB+ and GTLP 8-Bit Registered Transceiver Characteristics Comparison
CHARACTERISTIC FB+ GTLP
Logic levels TTL LVTTL
A
p
ort/daughter card
Transistors type – input/output CMOS/bipolar CMOS/CMOS
A
-
port/da
u
ghter
card
Drive levels –32/55 mA ±24 ma
Bus hold None None
I
off
and PU3S to support hot insertion Yes Yes
Signal levels BTL GTLP
Input – differential
±75 mV around fixed
threshold of 1.55 V
±50 mV around
variable threshold of
1.0 V
B-port/backplane
Transistor type – output
Bipolar
open collector
CMOS
open drain
Drive levels 100 mA @ 1.1 V 100 mA @ 0.55 V
Input/output capacitance (C
io
– max) 6 pF 10.5 pF
Slew rate – typical rise/fall 0.39/0.33 V/ns 0.5/0.43 V/ns
I
off
/PU3S and BIAS V
CC
to support live insertion Yes, 1.62 V to 2.1 V Yes, 0.95 V to 1.05 V
V
CC
5 V 3.3 V
Technology 0.8-m BiCMOS 0.65-m CMOS
I
CC
120 mA 40 mA
Power consumption 100 mW 50 mW
Transparent mode – maximum propagation delay
(GTLP ERC slow or fast for higher/lower values)
A to B 4.6 ns
B to A 5.6 ns
A to B 7.7 or 6.3 ns
B to A 5.5 ns
Device
Logic functions Many – both are exactly the same.
Device
ESD
HBM – 2000 V
MM – 200 V
CDM – 1000 V
HBM – 2000 V
MM – 200 V
CDM – 1000 V
Temperature range 0°C to 70°C –40°C to 85°C
Package offerings 52-pin TQFP
48-pin TSSOP,
TVSOP, or VFBGA
IEEE Std 1149.1 JTAG No pins assigned No pins assigned