Datasheet

SCEA017
7–282 GTLP in BTL Applications
List of Figures
1 Open-Collector Bus System Using BTL/FB+ Devices 7–283. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Open-Drain Bus System Using GTL Devices 7–283. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Typical Backplane Physical Representation 7–284. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 BTL and GTLP Signal-Level Comparison 7–286. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 GTLP V
REF
Resistor Network 7–287. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 GTLP EVM Backplane 7–291. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 GTLP EVM Driver and Termination Cards 7–292. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 GTLPH1655 Waveforms at GTLP Signal Levels (Group 1, Bit 1) 7–293. . . . . . . . . . . . . . . . . . . . . . . .
9 GTLPH1655 Waveforms at BTL Signal Levels (Group 1, Bit 1) 7–293. . . . . . . . . . . . . . . . . . . . . . . . . .
List of Tables
1 FB+ and GTLP 8-Bit Registered Transceiver Characteristics Comparison 7–285. . . . . . . . . . . . . . . .
2 High-Drive GTLP Functions 7–289. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 FB+ Functions 7–289. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 B-Port Edge-Rate Control 7–290. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Waveform Slew Rate and Duty Cycle 7–294. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6V
OH
and V
OL
vs I
OL
7–294. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction
In the past, the standard solutions for driving bus lines of backplane systems were
transistor-transistor logic (TTL) or 5-V CMOS logic circuits. However, some issues resulted from
the large 3.3-V or 5-V voltage swing, such as low system frequency performance and noise
generated when the outputs switch simultaneously.
An open-collector backplane transceiver logic (BTL) bus with a reduced output voltage swing
(<1V) that mitigates these concerns was introduced in the FutureBus Plus (FB+) family of
devices. The falling edge is generated actively by the open-collector driver, and the rising edge
is generated by a passive pullup network. A pullup network, with the termination resistance
matching the loaded bus line impedance, provides optimum signal integrity and incident-wave
switching.
Many BTL/FB+ backplanes are in operation. Engineers looking to the future see open-drain
Gunning transceiver logic plus (GTLP) devices as a lower-power, higher-frequency migration
path. However, their investment in the existing BTL backplanes and cards must be maintained
for at least several more years.
This application report discusses how GTLP devices can be substituted for FB+ devices and
operated at BTL signal levels until all the cards have been converted to GTLP, or until the higher
system frequencies available from GTLP are needed for increased data throughput. Then, the
entire BTL system can be converted easily to GTLP signal levels simply by changing the
reference voltage and reducing the backplane termination voltage.