Datasheet
SCEA022
7–263
Achieving Maximum Speed on Parallel Buses With Gunning Transceiver Logic (GTLP)
3.1.1 Skew
Skew is the small difference that arises from different propagation delays between output stages
within a device. These differences, which cannot be prevented, are defined in the EIA/JEDEC
standard,
Definition of Skew Specification for Standard Logic Devices
(EIA/JESD 65) (see
Figure 6).
Input
Output 1
Output 2
t
pd2
t
pd1
t
sk(o)
Input
Output > L
Output > H
t
PLH
t
PHL
t
sk(p)
Process Skew
The maximum skew between outputs of various circuits of the same function type [t
sk(pr)
∼ 1 ns]
Output-to-Output Skew
The maximum difference of the delay
between the fastest and slowest output
driver within one circuit [t
sk(o)
∼ 0.5 ns]
Pulse Skew
The maximum difference of the delay
between rising- and falling-edge transition
of one single output pin of one circuit
[t
sk(p)
∼ 0.8 ns]
Figure 6. Skew Definitions
Output-to-output skew, t
sk(o)
, is the maximum difference between the slowest and the fastest of
the drivers within a package. For clock distribution drivers, t
sk(o)
is approximately 500 ps. For
interface devices, this parameter is not always given, but is typically less than 1 ns.
Pulse skew, t
sk(p)
, describes the difference in propagation delay time between the positive and
negative edge, and it is an important definition, if there is a specific duty cycle required.
Should more than one device participate in the clock distribution, process skew (which is the
maximum difference in propagation time between drivers of the same function) is defined.
Process skew is added to the output-to-output skew.