Datasheet

Application Report
SCEA022 - April 2001
7–255
Achieving Maximum Speed on Parallel Buses
With Gunning Transceiver Logic (GTLP)
Johannes Huchzermeier Standard Linear & Logic
ABSTRACT
This application report compares two approaches for synchronous bus-system designs. The
focus of the report is the comparison of a system using central-synchronous system clock
(CSSC) with a system operated with a source-synchronous system clock (SSSC).
The basic characteristics of lines, key factors that influence the bus line delay, and the
impedance of bus lines are described.
The theoretical advantages of an SSSC system over a CSSC system are based on a
comparison of timing budget calculations. Theoretical results are confirmed by
measurements, using the GTLP demonstration backplane.
In the SSSC mode, the system-clock frequency is, with a clock frequency of 120 MHz, about
2.4 times higher than in the CSSC mode.
Contents
1 Introduction 7–257. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Physical Properties and Limitations of Bus Lines 7–258. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Transfer Modes 7–262. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Parameters for the Time Budget 7–262. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.1 Skew 7–263. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2 Propagation Time Due to Simultaneous Switching 7–264. . . . . . . . . . . . . . . . . . . . . . . . .
3.1.3 Setup and Hold Times at Receiver Input 7–265. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Central-Synchronous Clock Distribution 7–266. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Source-Synchronous Clock Distribution 7–269. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Measurements Using Texas Instruments GTLP Evaluation Module 7–272. . . . . . . . . . . . . . . . .
4.1 Data Transfer With System-Synchronous Clock 7–274. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Data Transfer With Source-Synchronous Clock 7–276. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Summary 7–278. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Glossary 7–279. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Bibliography 7–280. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .