Datasheet

SZZA016B
7–252
Basic Design Considerations for Backplanes
Backplane DC Effects – Theory to Practice
Figure 20 shows the dc effects previously described in the Backplane DC Effects section on a
fully loaded backplane with waveforms plotted at different terminations. V
OL
information is taken
with an 8-MHz clock frequency (4-MHz data), which is the slowest crystal oscillator we had on
hand, in order to eliminate as much ac switching effects from the V
OL
measurement as possible.
Each set of waveforms represents measurements taken at each end of the GTLP EVM (or
points A and B as described in Figure 11). As expected, V
OL
decreases as the termination
voltage increases because the GTLP driver is able to drive the line lower with a higher
resistance load.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1.5 V
R
TT
V
TT
SN74GTLPH1655 With Edge-Rate Control in Fast and Frequency = 100 MHz
R
TT
= 50 Ω
R
TT
= 33 Ω
R
TT
= 25 Ω
Point B
Point B
Point B
Point A
Point A
Point A
V
REF
V
TT
V
REF
V
TT
V
REF
V
TT
Figure 20. Fully Loaded Backplane vs R
TT
(Driver in Slot 1, Receiver in Slot 20)
Assuming the line resistance from one end of the GTLP EVM to the other (slot 2 to slot 20) to be
about 2.7 Ω, an on resistance of the SN74GTLPH1655 output driver to be 2.75 Ω (measured
value), and V
TT
= 1.5 V, and using equations 10 and 11, theoretical values vs actual test
measurements were obtained (see Table 4). V
TT
voltage source cause V
OL
(and V
OH
) to
fluctuate; the difference in the two levels was plotted (not shown) and measured. This voltage
difference was then compared to the calculated values, and the data shows that a very good
correlation exists. Thus, validity of equations 10 and 11 is verified.