Datasheet
SZZA016B
7–250
Basic Design Considerations for Backplanes
The total capacitance in all the above cases was calculated to be about 14 pF, based on the
observed optimum R
TT
. Analyzing each component in the capacitance chain on the daughter
card is summed below, with the results close to observed and measured. The daughter-card
construction use for the GTLP EVM is different from the original assumptions. The via and
stub 1 add no capacitance to the line. Through-hole connectors, instead of surface mount, were
used for increased reliability, but at the expense of additional capacitance. C
cpad3
was added
and is required to connect the device to stub 2.
C
t
C
via
C
stub1
C
cpad1
C
con
C
cpad2
C
stub2
C
cpad3
C
io
0 0 0.5 2.0 0.5 3.3 0.5 7 14.5 pF
Where:
C
via
= capacitance of via = 0 pF
C
stub1
= capacitance of stub 1 = 0 pF
C
cpad1
= capacitance of C
pad1
= 0.5 pF
C
cpad2
= capacitance of C
pad2
= 0.5 pF
C
stub2
= capacitance of stub 2 = 1 in. × 3.3 pF/in. = 3.3 pF
C
con
= capacitance of connector = 2.0 pF
C
cpad3
= capacitance of C
pad3
= 0.3 pF
C
io
= typical input/output capacitance of device (SN74GTL1655) = 7 pF
The procedure to determine the actual backplane natural trace impedance (Z
o
) was to measure
the daughter-card C
t
directly (13.8 pF). Then, flight time, with only slot 1 occupied, was
measured and divided by backplane length to determine that t
pd
unloaded was 230 ps/in. The
same procedure was used in a fully loaded condition, and the resulting t
pd
was 616 ps/in. Using
the backplane calculator set to the new C
t
, Z
o
was adjusted to match the measured t
pd
. The new
Z
o
was 96 Ω, C
o
= 2.4 pF/in., and Z
o(eff)
= 36 Ω.
Table 2 provides the results of additional investigation using different equipment (i.e., TDR) on
each of the eight traces in the 20-slot group (group 1) on the GTLP EVM. Z
o
is calculated and is
our best estimate. The backplane trace impedance with only the connector pins attached (i.e., all
cards removed) (Z
o
′) and the backplane trace impedance in a fully loaded backplane (i.e.,
20 cards inserted) (Z
o
′′) are measured. Group 1, bit 1, Z
o
is closer to 91 Ω and, in the fully
loaded case, the t
pd
is 564 ps/in. vs our assumption of 624.3 ps/in. This makes round-trip flight
time 20.2 ns, which is much closer to the observed time of 20.8 ns.
Table 2. GTLP EVM Group 1 Trace Impedance
GROUP 1
TRACE
D1 D2 D3 D4 D5 D6 D7 D8
Natural Trace Impedance
Z
o
(Ω) 91 47.5 47 47 48 47.5 83 47.5
t
pd
(ps/in.) 165 140 138 139 141 148 147 142
C
o
(pf/in.) 1.81 2.95 2.94 2.96 2.94 3.12 1.77 2.99
Trace Impedance With Only Connectors
Zo′ (Ω) 62.7 37.5 37 36.3 37.1 37.9 58.5 36.8
t
pd
′ (ps/in.) 240 177 175 180 183 185 208 183
Trace Impedance Under Full Load
Z
o
′′ (Ω) 26.6 17.7 17.9 17.5 17.9 18 24.8 17.7
t
pd
′′ (ps/in.) 564 377 362 373 377 390 493 382
(19)