Datasheet

SZZA016B
7–249 Basic Design Considerations for Backplanes
Very Lightly Loaded Backplane
Figure 19 clearly shows the effect of the different termination resistors on signal integrity when
every other three cards are removed from the EVM and the distributed capacitive load is
reduced by a factor of four.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
25-MHz Data
43.5-MHz Data
11.5-MHz Data
0.41 V/ns
0.36 V/ns
0.54 V/ns
0.4 V/ns
0.47 V/ns
0.33 V/ns
1.5 V
10 ns
10 ns
25 ns
SN74GTLPH1655DGGR With Edge-Rate Control in Slow
1.5 V
V
TT
R
TT
R
TT
= 25 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
R
TT
= 50 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
R
TT
= 25 Ω
R
TT
= 25 Ω
R
TT
= 50 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
V
REF
V
TT
R
TT
= 50 Ω
V
REF
V
TT
V
REF
V
TT
Figure 19. Very Lightly Loaded Backplane vs R
TT
(Driver in Slot 1, Receiver in Slot 5)
C
t
can be calculated and should be the same values as obtained in the other cases. Optimum
R
TT
, in this case, is 60 Ω (extrapolated from Figure 19).
C
d
+ ǒ
Z
2
o
R
2
TT
* 1Ǔ C
o
+
ǒ
95
2
60
2
* 1
Ǔ
2.40 pFńin. + 3.62 pFńin.
C
t
+ C
d
d + 3.62 pFńin. 3.76 in. + 13.6 pF
In all cases, the C
t
values agree closely (within ±5%).
t
pd(eff)
= t
pd
×
1 )
ǒ
C
d
ńC
o
Ǔ
Ǹ
= 230 ps/in. × 1.58 = 364.3 ps/in.
Therefore, flight time is 15.1 in. (15 slots × 0.94 in. + 1 in.) × 364.3 ps/in. or 5.5 ns.
Round-trip flight time from slot 5 to the load, and back, is 11.0 ns.
The observed settling time is about 10 ns. Some oscillations are evident to about 25 ns.
In all cases (i.e., fully, lightly, and very lightly loaded) observed vs calculated flight times are
within 10%.
(17)
(18)