Datasheet

SZZA016B
7–248
Basic Design Considerations for Backplanes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
25-MHz Data
43.5-MHz Data
11.5-MHz Data
1.5 V
10 ns
10 ns
25 ns
0.33 V/ns
0.5 V/ns
0.5 V/ns
0.31 V/ns
0.5 V/ns
0.33 V/ns
SN74GTLPH1655DGGR With Edge-Rate Control in Slow
V
REF
V
TT
1.5 V
V
TT
R
TT
R
TT
= 25 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
R
TT
= 50 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
R
TT
= 25 Ω
R
TT
= 25 Ω
R
TT
= 50 Ω
R
TT
= 33 Ω
R
TT
= 38 Ω
V
REF
V
TT
V
REF
V
TT
R
TT
= 50 Ω
Figure 18. Lightly Loaded Backplane vs R
TT
(Driver in Slot 1, Receiver in Slot 3)
All termination resistances again show incident-wave switching, with noise margin gained as the
termination-resistor value is reduced, but all resistances are within acceptable noise-margin
limits. This shows a very important point; reducing C
t
by increasing slot spacing, reducing stub
length, using devices with a lower C
io
, or a combination of all three reduces the loaded
backplane capacitance, allowing a higher termination-resistor value to be used.
C
t
can be calculated again, and should be the same value as obtained for the fully loaded case.
Optimum R
TT
, in this case, is 46 Ω (interpolated from Figure 18).
C
d
+ ǒ
Z
2
o
R
2
TT
* 1Ǔ C
o
+
ǒ
95
2
46
2
* 1
Ǔ
2.40 pFńin. + 7.84 pFńin.
C
t
+ C
d
d + 7.84 pFńin. 1.88 in. + 14.73 pF
The fully loaded and lightly loaded C
t
values agree closely, as expected.
t
pd(eff)
= t
pd
×
1 )
ǒ
C
d
ńC
o
Ǔ
Ǹ
= 230 ps/in. × 2.07 = 475.1 ps/in.
Therefore, flight time is 16.98 in. (17 slots × 0.94 in. + 1 in.) × 475.1 ps/in. or 8.1 ns.
Round-trip flight time from slot 3 to the load, and back, is 16.2 ns.
The observed settling time is 15.5 ns.
(15)
(16)