Datasheet

7–197
Simultaneous Switching
In a given digital circuit, there is a large change in current over a very short time when multiple outputs switch simultaneously.
As this increased current flows through the bond wires and the leadframe, it develops a voltage across the wire’s inductance. This
feedback mechanism is known as simultaneous switching noise (SSN). This noise manifests itself as V
OL
or V
OH
voltage bounce
at the package pin(s).
From basic circuit analysis, the induced voltage across an inductor is defined as:
v + L
di
dt
Where:
L = Inductance
di/dt = Rate of change of the current
The current through an output is dependent on the voltage level and the load at the output, which can be expressed
mathematically as:
i + C
dv
out
dt
Analysis of equations (1) and (2) clearly shows that because of the lower voltage swing, GTL and BTL offer better noise immunity
compared to TTL or CMOS outputs.
As the speed of today’s circuits increases, the current rate of change (di/dt) increases and so does the susceptibility to SSN, i.e.,
voltage bounce (GND and V
CC
). The standard methodology devised by the industry to measure voltage bounce is to keep one
output at either logic high (V
OH
) or logic low (V
OL
) and to switch all other outputs at a predefined frequency. Figures 6 through 9
compare both GTL and BTL for noise immunity as 17 outputs are switching simultaneously.
T
A
= 25°C, V
CC
= 5 V, V
IH
= 3 V, V
IL
= 0 V, BIAS V
CC
= 5 V, BG V
CC
= 5 V, V
TT
= 2.1 V, R
TT
= 33
GND
V
OHV
V
OHP
FB1650
Channel 1 = 500 mV/div,
Timebase = 5 ns/div,
V
OHV
= 1.94 V,
V
OHP
= 2.26 V
17 Outputs Switching
Figure 6. FB1650 High Output Voltage Peak and Valley Noise on an Unswitched Output
(1)
(2)