Datasheet

7–188
Figure 18 shows the data-sheet dc specifications for bus hold. The first test condition is the minimum current required to hold
the bus at 0.8 V or 2 V. These voltages meet the specified low and high levels for TTL inputs. The second test condition is the
maximum current that the bus-hold circuit sources or sinks at any input voltage between 0 V and 3.6 V (for low-voltage
families) or between 0 V and 5.5 V (for ABT). The bus-hold current becomes minimal as the input voltage approaches the rail
voltage. The output leakage currents, I
OZH
and I
OZL,
are insignificant for transceivers with bus hold because a true leakage
test cannot be performed due to the existence of the bus-hold circuit. Because the bus-hold circuit behaves as a small driver,
it tends to source or sink a current that is opposite in direction to the leakage current. This situation is true for transceivers with
the bus-hold feature only and does not apply to buffers. All LVT, ABT Widebus+, and selected ABT octal and Widebus devices
have the bus-hold feature (refer to Table 1 or contact the local TI sales office for more information).
electrical characteristics over recommended operating free-air temperature range (for families
with bus-hold feature)
†
PARAMETER TEST CONDITIONS MIN MAX UNIT
LVT LVC ALVC
V
CC
=3V
V
I
= 0.8 V 75
Dt i t
LVT
,
LVC
,
ALVC
V
CC
=
3
V
V
I
= 2 V –75
I
I(hold)
Data inputs
or I/Os
LVC, ALVC V
CC
= 3.6 V, V
I
= 0 to 3.6 V ±500
µA
()
or
I/Os
ABT Widebus+ and
V
CC
=45V
V
I
= 0.8 V 100
selected ABT
V
CC
=
4
.
5
V
V
I
= 2 V –100
Transceivers
ABT
This test is not a true I
OZ
test because bus
hold alwa
y
s is active on an I/O pin. Bus hold
±1
I
OZH
/I
OZL
with bus hold
LVT, LVC, ALVC
y
tends to supply a current that is opposite in
direction to the output leakage current.
±1
µA
Buffers
ABT
This test is a true I
OZ
test since bus hold does
±10
with bus hold
LVT, LVC, ALVC
OZ
not exist on an output pin.
±5
†
Refer to the latest TI data sheets for device specifications.
Figure 18. Example of Data-Sheet Minimum Specification for Bus Hold
Summary
Floating inputs and slow rise and fall times are important issues to consider when designing with CMOS and advanced
BiCMOS families. It is important to understand the complications associated with floating inputs. Terminating the bus properly
plays a major role in achieving reliable systems. The three methods recommended in this application report should be
considered. If it is not possible to control the bus directly, and adding pullup or pulldown resistors is impractical due to
power-consumption and board-space limitations, bus hold is the best choice. TI designed bus hold to reduce the need for
resistors used in bus designs, thus reducing the number of components on the board and improving the overall reliability of
the system.