Datasheet

7–187
The power consumption of the bus-hold circuit is minimal when switching the input at higher frequencies. Figure 17 shows
the power consumed by the input at different frequencies, with or without bus hold. The increase in power consumption of the
bus-hold circuit at higher frequencies is not significant enough to be considered in power calculations.
Switching Time - µs
Power – mW
Power Plot of the Input With Bus Hold
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
14
12
10
8
6
4
2
0
10 MHz
20 MHz
40 MHz
50 MHz
100 MHz
V
CC
= 5.5 V
Switching Time - µs
Power – mW
Power Plot of the Input Without Bus Hold
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
14
12
10
8
6
4
2
0
10 MHz
20 MHz
40 MHz
50 MHz
100 MHz
V
CC
= 5.5 V
Figure 17. Input Power With and Without Bus Hold at Different Frequencies