Datasheet
7–169
ABTE, FB, and CBT (CBT6800 only) have an added feature called BIAS V
CC
. This feature is used to precharge the output,
trace, and connector capacitance during power up. This circuit prevents the device from spiking the backplane and disrupting
the data during hot-card insertion. For this feature to work, both ground and BIAS V
CC
pins must make contact before V
CC
does (both pins should be the longest on the card).
Additional Design Considerations for GTL and BTL/FB
GTL
To successfully design with the GTL family, several rules and techniques with regard to voltage generation and proper
termination must be followed. First, both 3.3-V and 5 V-V
CC
are needed in the current generation of GTL devices (only the
3.3-V V
CC
will be needed in the next-generation GTL). Second, the termination voltage (V
TT
= 1.2 V) should be regulated
from the 5-V- V
CC
, keeping in mind the current requirements of the outputs (40 mA per output). There are several linear
regulators that are capable of performing this function. Depending on the design, the regulator could be either on the backplane
itself or on the individual cards. Third, the reference voltage (V
REF
= 0.8 V) must be generated from V
TT
. The V
REF
voltage
can be generated using a simple voltage-divider circuit with an appropriate bypass capacitor (0.01 µF or 0.1 µF) placed as close
as possible to the V
REF
pin. The V
REF
input circuitry consumes very little power (1-µA max). This enables several devices
to have their V
REF
pin connected to the same voltage-divider circuit, thus eliminating the need for multiple voltage-divider
circuits (see Figure 41).
V
REF
V
TT
R
C2R
Figure 41. Proposed Circuit to Generate V
REF
BTL/FB
For the BTL family, there are four power supplies and two grounds to be connected. For live-insertion applications, the
power-up scheme should be as follows: the GND lead should make contact first, followed by BIAS V
CC
. This sequence
precharges the board and the device capacitance and establishes a voltage between 1.62 V and 2.1 V on the BTL outputs. Next,
V
CC
makes contact and, as it ramps up, the BIAS-V
CC
circuitry starts to turn off. When V
CC
reaches its final value, the BIAS
V
CC
circuitry is completely isolated and does not interfere with the device functionality. BG-V
CC
and BG-GND pins are used
to supply power to the bias-generator input circuitry. Both signals must be isolated from the rest of the power supplies. This
ensures the signal integrity at the BTL input. The 2.1-V V
TT
should be regulated from a higher voltage and should supply
enough current to switch all 18 outputs (100 mA per output). V
TT
variation should not exceed ±2% and it is recommended
that proper bypass capacitors (0.01 µF or 0.1 µF) be used. The termination resistor should not exceed ±1% of its
resistance value.