Datasheet

7–166
Bus-Hold Circuit
The most effective method to provide defined levels for a floating bus is to use TI’s bus hold as a built-in feature on selected
families (see Table 3).
Table 3. List of Devices With Bus Hold
FAMILY BUS HOLD
ABT WIdebus+ (32- and 36-bit) All devices
ABT Octals and Widebus Selected devices
Low Voltage (LVT and ALVC) All devices
LVC Octals and Widebus Selected devices
GTL A port only
Bus hold is a circuit used in TI’s selected families to help solve the floating-input problem and eliminate the need for pullup
and pulldown resistors. It consists of two back-to-back inverters, with the output fed back to the input via a resistor (see
Figure 36). To understand how the bus-hold cell operates, let’s assume that an active driver has switched the line to a high level.
This results in no current flowing through the feedback circuit. Now, the driver goes in the high-impedance state and the
bus-hold circuit holds the high level via the feedback resistor. The current requirement of the bus hold is determined only by
the leakage current of the circuit. The same condition applies when the bus is in the low state and then goes inactive.
Input
Figure 36. Typical Bus-Hold Cell
Table 4 shows the data-sheet dc specifications for bus hold. The first specification is the minimum available current to hold
the bus at 0.8 V or 2 V. These voltages are the guaranteed low and high levels for TTL inputs. The second specification is the
maximum current that the bus hold sources or sinks at any input voltage between 0 V and 3.6 V (for low-voltage families) or
between 0 V and 5.5 V (for ABT). The bus-hold current becomes minimal as the input approaches the rails. The output leakage
currents, I
OZH
and I
OZL
, are insignificant for transceivers with bus hold since a true leakage test cannot be achieved due to the
existence of the bus-hold circuit. Since bus hold behaves as a small driver, it tends to source or sink a current that is opposite
in direction to the leakage current. This situation is true for transceivers with bus hold only and does not apply to buffers. Note
that all LVT, ABT Widebus+, selected ABT and LVC octals, and Widebus devices have the bus-hold feature. Refer to
Table 4 or the manufacturer for more information.
Table 4. Data-Sheet Specification for Bus Hold
electrical characteristics over recommended operating free-air temperature range
(for families with bus-hold features)
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
CC
=3V
V
I
= 0.8 V 75
I
I(hold)
LVT, LVC, ALVC Data inputs or I/Os
V
CC
=
3
V
V
I
= 2 V –75
µA
()
V
CC
= 3.6 V, V
I
= 0 to 3.6 V ±500
ABT Widebus+

V
CC
=45V
V
I
= 0.8 V 100
I
I(hold)
ABT
Widebus+
and selected
Data inputs or I/Os
V
CC
=
4
.
5
V
V
I
= 2 V –100
µA
()
ABT Widebus
V
CC
= 5.5 V, V
I
= 0 to 5.5 V ±500
I
OZH
/I
OZL
ABT
Transceivers
This test is not a true I
OZ
test since bus hold is
alwa
y
s active on an I/O pin. It tends to suppl
y
a
±1
µA
I
OZH
/I
OZL
LVT, LVC, ALVC
with bus hold
yy
current that is opposite in direction to the output
leakage current.
±1
µ
A
I
OZH
/I
OZL
ABT
Buffers This test is a true I
OZ
test since bus hold does
±10
µA
I
OZH
/I
OZL
LVT, LVC, ALVC
with bus hold
OZ
not exist on an output pin.
±5
µ
A