Datasheet

7–155
The current through an output is dependent on the voltage level and the load seen at the output. This can be expressed
mathematically as:
i + C
ǒ
dv
out
ńdt
Ǔ
Analysis of equations 12 and 13 clearly shows that the more V
CC
and ground pins there are, the lower the lead inductance,
resulting in less noise.
As the speed of today’s circuits increases, di/dt increases and so does the generation of simultaneous-switching noise.The
standard methodology devised by the industry to measure voltage bounce is to keep one output at either logic high (V
OH
) or
logic low (V
OL
) and to switch all other outputs at a predefined frequency. Figures 24 through 26 show a comparison of the
noise generation as (N – 1) outputs are switched simultaneously while the Nth output is held high or low. Refer to Figure 1
for the guaranteed V
IL
(max) and V
IH
(min) specification for various families.
3.3-V Families
LV
†
LVC LVT LVT2 ALVC ABT ABT2 ABTE CBT
‡
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
OLP
– V
T
A
= 25°C, V
CC
= 3.3 V,
V
IH
= 3 V, V
IL
= 0 V, Standard load
5-V Families
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
OLP
– V
T
A
= 25°C, V
CC
= 5 V,
V
IH
= 3 V, V
IL
= 0 V, Standard load
†
LV is tested using octal packages only.
‡
Data is based on the input signal characteristics: V
IL
= 0 V, V
IH
= 3 V, t
r
/t
f
= 2 ns.
Figure 24. Typical Output Low-Voltage Peak (V
OLP
) on 3.3-V and 5-V Families
3.3-V Families
LV
†
LVC LVT LVT2 ALVC ABT ABT2 ABTE CBT
‡
5-V Families
T
A
= 25°C, V
CC
= 3.3 V,
V
IH
= 3 V, V
IL
= 0 V, Standard load
T
A
= 25°C, V
CC
= 5 V,
V
IH
= 3 V, V
IL
= 0 V, Standard load
3.5
3
2.5
2
1.5
1
0.5
0
V
OHV
– V
3.5
3
2.5
2
1.5
1
0.5
0
V
OHV
– V
†
LV is tested using octal packages only.
‡
Data is based on the input signal characteristics: V
IL
= 0 V, V
IH
= 3 V, t
r
/t
f
= 2 ns.
Figure 25. Typical Output High-Voltage Valley (V
OHV
) on 3.3-V and 5-V Families
(13)