Datasheet

7–148
BiCMOS
Note: ∆I
CC
= 0 for bipolar devices.
P
S
+ V
CC
ƪ
DC
en
ǒ
N
H
I
CCH
N
T
) N
L
I
CCL
N
T
Ǔ
)
(
1 * DC
en
)
I
CCZ
)
(
N
TTL
DI
CC
DC
d
)
ƫ
P
D
+
[
DC
en
N
sw
V
CC
f
i
(
V
OH
* V
OL
)
C
L
]
)
[
DC
en
N
sw
V
CC
f
2
I
CCD
]
10
*3
Where:
V
CC
= Supply voltage (V)
I
CC
= Power supply current (A) (from the data sheet)
I
CCL
= Power supply current (A) when outputs are in low state (from the data sheet)
I
CCH
= Power supply current (A) when outputs are in high state (from the data sheet)
I
CCZ
= Power supply current (A) when outputs are in high-impedance state (from the data sheet)
∆I
CC
= Power supply current (A) when one input is at a TTL level (from the data sheet)
DC
en
= % duty cycle enabled (50% = 0.5)
DC
d
= % duty cycle of the data (50% = 0.5)
N
H
= Number of outputs in high state
N
L
= Number of outputs in low state
N
sw
= Total number of outputs switching
N
T
= Total number of outputs
N
TTL
= Number of inputs driven at TTL levels
f
i
= Input frequency (Hz)
f
o
= Ouput frequency (Hz)
f
1
= Operating frequency (Hz)
f
2
= Operating frequency (MHz)
V
OH
= Output voltage (V) in high state
V
OL
= Output voltage (V) in low state
C
L
= External load capacitance (F)
I
CCD
= Slope of the I
CC
-versus-frequency curve (mA/MHz × bit)
For GTL and BTL/FB devices, the power consumption/calculation is similar to a BiCMOS device, with the addition of the
output power consumption through the pullup resistor, since GTL is open drain and BTL/FB is open collector.
Package Power Dissipation
Thermal awareness became an industry concern when surface-mount technology (SMT) packages began replacing
through-hole (DIP) packages in PCB designs. Circuits operating at the same power enclosed in a smaller package meant higher
power density. To add to the issue, systems required increased throughput, which resulted in higher frequencies, increasing
the power density even further. Not only do these same issues concern designers today, they are getting progressively
more severe.
Figure 17 explains part of the reason for increased attention to thermal issues. As a baseline for comparison, the 24-pin
small-outline integrated circuit (SOIC) is shown, along with several fine-pitch packages supplied by TI, including the 24- and
48-pin SSOP, 24- and 48-pin TSSOP, and 100-pin thin quad flat pack (TQFP). The 24-pin TSSOP (8, 9, and 10 bits) allows
for the same circuit functionality of the 24-pin SOIC to be packaged in less than a third of the area, while the 48-pin TSSOP
(16, 18, and 20 bits) occupies less area and has twice the functionality of the 24-pin SOIC. This same phenomenon is expanded
even further with the 100-pin TQFP (32 and 36 bits), which is the functional equivalent of four 24-pin or two 48-pin devices,
with additional board savings over that of the SSOP packages. As the trend in packaging technology moves toward smaller
packages, attention must be focused on the thermal issues that are created.
(9)
(10)