Datasheet

7–140
V
IH
(min)
V
IL
(max)
CBA
V
Figure 10. Reflected-Wave Switching
Using typical V
OH
and V
OL
values, along with data points from the curves, one can calculate the typical impedance the device
can drive. For example, an ABT device can typically drive a line (from either end) in the 25-Ω range on the incident wave.
However, if the same line is driven from the middle, the effective impedance seen by the driver is half its original value
(12.5 Ω), which requires more current to switch it on the incident wave.
For a low-to-high transition, (I
OH
= 85 mA @ V
OH
= 2.4 V):
Z
LH
+
V
OH
(min) * V
OL
(typ)
I
OH
+
2.4 V * 0.3 V
85 mA
+ 25 W
For a high-to-low transition, (I
OL
= 135 mA @ V
OL
= 0.5 V):
Z
HL
+
V
OH
(typ) * V
OL
(max)
I
OL
+
3.5 V * 0.5 V
135 mA
+ 22 W
GTL and BTL Input/Output Structure
BTL and GTL buffers are designed with minimal output capacitance (5-pF max), compared to a TTL output buffer (8-pF to
15-pF typ). A TTL or a CMOS output capacitance, coupled with the capacitance of the connectors, the traces, and the vias,
reduces the characteristic impedance of the backplane. For a high-frequency environment, this phenomenon makes it difficult
for the TTL or CMOS driver to switch the signal on the incident wave. A TTL or CMOS device needs a higher drive current
than is presently available to be able to switch the signal under these conditions. However, increasing the output drive clearly
increases the output capacitance. This scenario again reduces the characteristic impedance even more. That is why a
lower-signal-swing family with reduced output capacitance, like BTL or GTL, is recommended when designing
high-speed backplanes.
The GTL input receiver is a differential comparator with one side connected to the reference voltage (V
REF
), which is provided
externally (0.8-V typ). The threshold is designed with a precise window for maximum noise immunity (V
IH
= V
REF
+ 50 mV
and V
IL
= V
REF
– 50 mV). The output driver is an open-drain n-channel device that, when turned off, is pulled up to the output
supply voltage (V
TT
= 1.2-V typ), and when turned on, the device can sink up to 40 mA of current (I
OL
) at a maximum output
voltage (V
OL
) of 0.4 V. The output is designed for a doubly-terminated 50-Ω transmission line (25-Ω total load). The I/Os are
designed to work independently of the device’s V
CC
. They can communicate with devices designed for 5-V, 3.3-V, or even
2.5-V V
CC
. The TTL input is a 5-V-tolerant, 3.3-V CMOS inverter (can interface with 5-V TTL signals). Bus hold is also
provided on the TTL port to eliminate the need for external resistors when the I/Os are unused or floating. The TTL output
is a bipolar output. It is similar to the LVT output structure. The family requires two power supplies to function: a 5-V supply
[V
CC(5)
] for the GTL I/Os and 3.3-V supply [V
CC(3.3)
] for the LVTTL I/Os. The 5-V supply is used only on the GTL16612
and GTL16616. The maximum frequency at which the current family operates is 95 MHz (GTL16612 and GTL16616). Future
functions such as GTL16622 and GTL16922, will be available as samples in early 1996 and will be released at the end of the
year. They run as high as 200 MHz in both directions (GTL-to-TTL or TTL-to-GTL) and have a single 3.3-V power supply.
GTL16922 has 5-V-tolerant TTL I/Os. Figure 11 shows a typical GTL input and output circuit and Figure 12 shows their
characteristic impedance. Since GTL has an open-drain output, only the I
OL
/V
OL
curve is displayed.
(1)
(2)