Datasheet

7–137
V
CC
ABT Output
Q3
Q4
R2R1
D1
V
OUT
M1
ABT OUTPUT STAGE
Figure 6. Typical Output Cell for 5-V Families
Figure 7 shows a simplified LVT output and illustrates the mixed-mode capability designed into the output stage. This
combination of a high-drive TTL stage, along with the rail-to-rail CMOS switching, gives the LVT series exceptional
application flexibility. These parts have the same drive characteristics as 5-V ABT devices and provide the dc drive needed
for existing 5-V backplanes. Thus, using LVT is a simple way to reduce system power via the migration to 3.3-V operation.
Not only can LVT devices operate as 3-V- to 5-V-level translators by supporting 5-V input or I/O voltages (V
CC
= 2.7 V to
3.6 V), but also the inputs can withstand 5.5 V, even when V
CC
= 0 V. This allows for the devices to be used under partial system
power-down and live-insertion applications.
V
CC
LVT Output
D1
5-V-TOLERANT OUTPUT STAGE
(LVT/LVC)
V
CC
R2
Q3
Q4
V
OUT
LVC Output
V
OUT
V
CC
NON-5-V-TOLERANT OUTPUT STAGE
(ALVC/LV)
ALVC/LV Output
V
OUT
V
CC
Figure 7. Typical Output Cell for 3.3-V Families