Datasheet

SCEA019 - January 2001
Texas Instruments GTLP Frequently Asked Questions 7–117
FB+ devices have a fixed differential input set at 1.55 V, whereas GTLP devices have a
variable differential input that is set via the external V
ref
control pin. GTLP V
ref
is normally
two-thirds of the termination voltage
so that when V
TT
is 1.5 V, V
ref
is 1.0 V.
When GTLP devices are used in FB+ device applications, the resistor network is changed to
R/3R so that V
ref
is set at 1.575 V when V
TT
is 2.1 V. The process is reversed easily from BTL
to GTLP signal levels by changing the 3R resistor to 2R. Only high-drive GTLP devices should
be used because FB+ devices also sink 100 mA of current. In actual applications, the
high-drive GTLP device pulls the B-port V
OL
lower than 1.1 V, with a corresponding increase
in I
OL
, so a higher-value termination resistor might be needed. SN74GTLPH1655 has been
operated in the GTLP EVM at BTL levels with excellent signal integrity and a duty cycle of
50%.
TI’s policy is not to recommend applications outside of data-sheet recommended limits, so, for
some TI GTLP devices, we are expanding the GTLP data sheet dc limits to cover this
application.
These expanded limits also will help in the cases where there may already be a 1.8-V or 2.0-V
power supply on the board and the designer is hesitant to use GTLP because that means a
1.5-V power supply will have to be added. In this case, just use the 1.8-V power supply for
V
TT
.
35 I’m trying to determine which 3.3-V logic family will best fit my needs,
and I’m still not quite clear on what choice I should make.
I’m looking for bus interface chips (e.g., 244s, 245s) to drive a backplane (tri-stateable
bus). There will be five cards on the bus [one power-supply card, one microcontroller
card (uC), one PCM card, and two fibre-channel interface cards (FCi)]. The bulk of the
signals are between the two FCi cards and the PCM card. The FC data bus is the critical
bus at 40 MHz, or maybe 80 MHz (undecided at this time). The data is sourced by one
of the two FCi cards and passed to the PCM card. The data is synchronous with the
system clock (40 MHz or 80 MHz) generated at the PCM card and goes to both FCi
cards. It’s important to maintain the phase relationship between this clock and the FC
data-bus data. We will have a 72-bit unidirectional and 8-bit bidirectional bus, plus
control signals. We have used FCT devices before and could get only up to about 25
MHz or so, and because this is a new design, there is a lot of flexibility on what we can
choose. Other considerations include: 3.3-V power supply with some 5-V devices on
the board, need industrial temperature range (prefer military) and desire high-density
packages.
What device family would you recommend and why?
GTLP would work at both 40 and 80 MHz and is optimized for backplane applications. It uses
a 3.3-V V
CC
power supply and is 5-V tolerant. It is offered in industrial temperature ranges in
several surface-mount and BGA packages. Military-temperature-range devices are being
considered and can be requested at [e-mail].