Datasheet

SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER
SCBS673F – AUGUST 1996 – REVISED AUGUST 2001
2–34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
Data flow in each direction is controlled by the output-enable (OEAB and OEBA) and clock (CLKAB and CLKBA)
inputs. The clock-enable (CEAB and CEBA) inputs control each 9-bit transceiver independently, which makes
the device more versatile.
For A-to-B data flow, the device operates on the low-to-high transition of CLKAB if CEAB is low. When OEAB
is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for
B to A is similar to that of A to B, but uses OEBA
, CLKBA, and CEBA.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Active bus-hold circuitry holds unused or undriven LVTTL inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
–40°C to 85°C TSSOP – DGG Tape and reel SN74GTL16622ADGGR GTL16622A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
‡
INPUTS
OUTPUT
MODE
CEAB OEAB CLKAB A
B
MODE
X H X X Z Isolation
H L X X B
0
§
Latched storage of A data
X L H or L X B
0
§
Latched
storage
of
A
data
L L ↑ L L
Clocked storage of A data
L L ↑ H H
Clocked
storage
of
A
data
‡
A-to-B data flow is shown. B-to-A data flow is similar, but uses OEBA, CLKBA,
and CEBA
.
§
Output level before the indicated steady-state input conditions are established