Datasheet

Output Edge Control (OEC
TM
) Circuitry Comparison ( V
TT
= 1.5V)
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
Voltage (V)
Time (ns)
0102030
Improving on a good thing
In recent years, GTL logic has become
increasingly popular in point-to-point
applications and backplane systems
with a limited number of slots. Now,
GTLP brings the high-speed advantages
of GTL to medium- and heavily loaded
parallel backplanes.
GTLP transceivers are differential
input, open-drain n-channel devices. TI
has optimized the Output Edge Control
circuitry in GTLP transceivers to ensure
good signal integrity (See chart below),
reduce line reflections and limit the
electromagnetic emissions at frequen-
cies greater than 80 MHz.
GTLP devices have been optimized
for a narrow signaling range between
0.55 and 1.5V with a threshold at 1.0V.
Additionally, GTLP transceivers will
operate at the GTL signal levels of 0.4
to 1.2V with a threshold at 0.8V.
GTLP transceivers are 3.3V CMOS
devices, but they have 5V-tolerant
LVTTL inputs and outputs which allows
them to act as 5V-to-GTLP translators
or 3.3V LVTTL-to-GTLP translators. As
CMOS devices, GTLP transceivers con-
sume less than a third of the power that
is typical for BiCMOS GTL devices.
Designing GTLP transceivers into
next-generation systems with signifi-
cantly higher data throughput speeds is
relatively easy because GTLP is backwards
compatible with the logic currently
used in parallel backplanes.
Matching your backplane needs
For maximum flexibility in matching
the needs of your backplane, the GTLP
family comes in medium- and high-drive
devices. High-drive devices sink 100
milli-Amperes (mA) of current, while
medium-drive devices sink 50mA.
Low impedance, heavily loaded back-
planes achieve better data throughput
performance with high-drive GTLP
devices.
High-drive GTLP devices also feature
TI's innovative variable edge rate control
circuitry which allows you to adjust the
signal's edge rate to better match the
conditions of your backplane.
An Easy Migration
To help the designer make an easy
migration to GTLP, this new logic family
is fully supported with tools like appli-
cation notes, application support, free
samples, demonstration backplane models,
and IBIS and SPICE simulation models.
Optimized OEC
Original OEC
The many packaging
options as well as
pin-outs that are
similar to previous-
generation devices
simplify the design-
er's task.
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