Datasheet

7–62
Card
1
Card
2
Card
3
Card
4
Card
5
Card
6
Card
7
Card
8
Card
9
Card
10
Card
11
Card
12
Card
13
Card
14
Card
15
Card
16
C3
C1 C2
X1
3.3 V 5 V
AC Power
Crystal Oscillator Clock Driver for Each Set
of Eight Cards
Termination Resistor
Data Generation
1.5-V Regulator V
TT
Generation
Figure 6. Backplane Demonstration Board Physical Layout
Interconnect and Impedance Calculations
Figure 7 is a graphical summary of the network that provides the physical dimensions of the backplane. Each element
introduces additional capacitance on the board, which increases the loading on the backplane, eventually affecting signal
integrity. The physical representation of the demonstration backplane shows the slots separated by 0.875 in. of backplane
trace (B). There is a 0.0625-in. stub between the backplane trace and the connector (C), followed by approximately 1 in. of
microstripline card stubs (D), and a total stub length of 1.0625 in. (as shown in the impedance calculator in Figure 8).
Drvr
V
TT
Conn.
0.25 in. 0.875 in.
0.625 in.
1 in.
Slot 1 Slot 2
V
TT
Slot 16Slot 15
0.25 in.
Conn. Conn. Conn.
Rcvr Rcvr Rcvr
Slot 3
Conn.
Rcvr
Slot 4
Conn.
Rcvr
Slot 5
Conn.
Rcvr
R
TT
R
TT
0.875 in. 0.875 in. 0.875 in. 0.875 in. 0.875 in.
0.625 in. 0.625 in. 0.625 in. 0.625 in. 0.625 in. 0.625 in.
1 in. 1 in. 1 in. 1 in. 1 in. 1 in.
(A) (B)
(C)
(D)
Figure 7. Backplane Physical Representation