Datasheet

7–61
Table 1. Noise-Margin Comparison
DEVICE
NOISE MARGIN
(mV)
TYPE
UPPER LOWER
GTL 350 350
GTL+ 450 400
Another issue to consider in backplane design is crosstalk. Crosstalk, an effect of capacitive coupling in backplanes, can also
result in false switching. Crosstalk between signal lines can be approximated as being inversely proportional to the distance
between the signal lines and directly proportional to the distance between the signal lines and the ground plane. The most
popular technique used to avoid crosstalk is fine-line technology that increases the distance between the signal lines while
decreasing the distance between the signal line and the reference plane.
Backplane Demonstration System
The TI backplane demonstration board represents a typical industry backplane. The following section explains the elements
of the demonstration backplane.
Architecture
Backplane Driver/Receiver (GTL16622A)
The GTL16622A 18-bit LVTTL-to-GTL/GTL+ bus transceiver translates between GTL/GTL+ signal levels and LVTTL or
5-V TTL signal levels. The device supports mixed-mode signal operation (3.3-V and 5-V signal) on the A port and control
pins and is hot insertable with an output drive capability of 50 mA.
4
The device is used as both the driver and the receiver on
the individual plug-in modules in the backplane.
Backplane Motherboard
The TI backplane demonstration board was constructed after studying various backplane loads. The 36-bit backplane consists
of 14-in. traces with 16 slots separated by 0.875-in. pitch. Figure 6 shows the physical layout of the backplane board and its
elements. The power supplies are represented as PS1 (5 V) and PS2 (3 V) and connectors by points P1 to P16. The connectors
host the driver/receiver cards.
The clock drivers are U1, U2, and U3. U1 and U2 each distribute the clock to eight loads, while U3 is configured to supply
the data at one-half the clock rate. The crystal oscillator (X1) supplies the clock and the data to the backplane board. The crystal
oscillator can be changed to configure the clock rates at any frequency. The frequencies that have been used to test the
demonstration board are 50 MHz, 66 MHz, 80 MHz, and 100 MHz. One of the plug-in cards is a driver, while the remaining
cards are receivers. The GTL16622A is used as both driver and receiver. The position of the driver card on the backplane can
be varied to study the loading effects and signal integrity on the backplane.
The 1.5-V termination voltage (V
TT
) for GTL+ is from a 5-V regulated power supply. The 3.3-V power supply provides power
to the GTL device on board. The voltage reference, V
REF
, is generated from V
TT
, using a simple voltage-divider circuit with
an appropriate bypass capacitor (0.1 µF) placed as close as possible to the V
REF
pin.
2
TI recommends placing the
voltage-divider circuitry on each daughter card, because this eliminates the noise introduced by the backplane trace.
The intrinsic, unloaded, backplane trace impedance is 50 Ω and has a loaded impedance of 25 Ω with 16 loaded slots. The
backplane is dc terminated using a 25-Ω resistor to V
TT
to match the loaded impedance of the backplane. The 36-bit backplane
is used to transmit data from the driver to each receiver card at the frequency of the crystal oscillator.