Datasheet

SN74GTL16616
17-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER
WITH BUFFERED CLOCK OUTPUTS
SCBS481H – JUNE 1994 – REVISED AUGUST 2001
2–25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1D
C1
CLK
1D
C1
CLK
B1
OEAB
CEAB
CLKAB
LEAB
LEBA
CLKBA
CEBA
OEBA
A1
1 of 17 Channels
CE
CE
CLKOUT
CLKIN
1
56
55
2
28
30
29
27
3
54
31
26
V
REF
35