Datasheet

SN74VMEH22501
LVTTL-TO-ETL 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS
TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS
SCES357A – JULY 2001 – REVISED SEPTEMBER 2001
6–19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
driver in slot 1, with one receiver in slot 21 (minimum load) (continued)
skew characteristics for UBT for specific worst-case V
CC
and temperature within the
recommended ranges of supply voltage and operating free-air temperature (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN TYP
†
MAX UNIT
t
sk(LH)
2
t
sk(HL)
3A 3B
2.3
ns
t
sk(LH)
2.1
t
sk(HL)
CLKAB 3B
2.4
ns
3A 3B 0.2 2.5
t
sk(t)
‡
CLKAB 3B 0.2 2.9
ns
3A 3B
t
sk(pp)
CLKAB 3B
ns
†
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI-SPICE models.
‡
t
sk(t)
– Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same
packaged device. The specifications are given for specific worst-case V
CC
and temperature and apply to any outputs switching in opposite
directions, both low to high (LH) and high to low (HL) [t
sk(t)
].
By simulating the performance of the device using the VME64x backplane (see Figure 3), the maximum peak current
in or out of the B-port output as the devices switch from one logic state to another was found to be equivalent to driving
the lumped load shown in Figure 4.
From Output
Under Test
LOAD CIRCUIT
235 Ω
165 Ω
390 pF
Figure 4. Equivalent AC Peak Output Current Lumped Load
PRODUCT PREVIEW