Datasheet

SN74FB1653
17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS702E – AUGUST 1997 – REVISED JUNE 2001
5–27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
live-insertion specifications over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
CC
(5 V) = 0 to 4.5 V,
V
CC
(3.3 V) = 3.3 V
450
µ
I
CC
(BIAS V
CC
)
V
CC
(5 V) = 4.5 V to 5.5 V,
V
CC
(3.3 V) = 3.3 V
V
B
= 0 to 2 V, V
I
(BIAS V
CC
) = 4.5 V to 5.5 V
10
µA
V
O
B port
V
CC
(5 V) = 0,
V
CC
(3.3 V)= 0 V
V
I
(BIAS V
CC
) = 5 V 1.62 2.1 V
V
CC
(5 V) = 0,
V
CC
(3.3 V) = 0 V
V
B
= 1 V, V
I
(BIAS V
CC
) = 4.5 V to 5.5 V –1
I
O
B port
V
CC
(5 V) = 0 to 5.5 V,
V
CC
(3.3 V) = 3.3 V
OEB = 0 to 0.8 V 100
µA
V
CC
(5 V) = 0 to 2.2 V,
V
CC
(3.3 V) = 3.3 V
OEB = 0 to 5 V 100
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
MIN MAX UNIT
f
clock
Clock frequency 90 MHz
LE high 3
t
w
Pulse duration
CLK high or low 3
ns
AI or B before LE↓ 3.5
t
su
Setup time
AI or B
before CLK↑ 3.5
ns
AI or B after LE↓ 1
t
h
Hold time
AI or B after CLK↑ 0.7
ns