Datasheet

SN74FB1651
17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS177N – OCTOBER 1993 – REVISED JUNE 2001
5–19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1
500 Ω
500 Ω
From Output
Under Test
LOAD CIRCUIT FOR B OUTPUTS
2.1 V
16.5 Ω
C
L
= 30 pF
(see Note A)
Test
Point
t
PHL
t
PLH
Output
3 V
0 V
V
OH
V
OL
Data Input
Timing Input
3 V
0 V
0 V
t
PHL
t
PLH
2 V
1 V
V
OH
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B TO A)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (A TO B)
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
V
OL
V
OH
t
PLZ
t
PZH
t
PZL
t
PHZ
3.5 V
0 V
V
OL
+ 0.3 V
V
OH
– 0.3 V
≈0 V
3 V
t
w
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES (A PORT)
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
Open
7 V
Open
TEST S1
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: TTL inputs: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns,
t
f
≤ 2.5 ns; BTL inputs: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
7 V
Open
1.5 V
1.5 V 1.5 V
3 V
0 V
1.5 V 1.5 V
Input
Input 1.5 V 1.5 V
1.55 V1.55 V
Output
Input
1.5 V 1.5 V
1.55 V1.55 V
1.5 V 1.5 V
1.5 V
1.5 V
3 V
GND
t
h
t
su
Figure 1. Load Circuits and Voltage Waveforms