Datasheet

SN74FB1651
17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS177N – OCTOBER 1993 – REVISED JUNE 2001
5–12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description
The SN74FB1651 contains an 8-bit and 9-bit transceiver with a buffered clock. The clock and the transceivers
are designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The
device is designed specifically to be compatible with IEEE Std 1194.1-1991.
The B
port operates at BTL-signal levels. The open-collector B ports are specified to sink 100 mA. Two output
enables (OEB and OEB
) are provided for the B outputs. When OEB is low, OEB is high, or V
CC
is less than 2.1 V,
the B
port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B
port when the
A-port output enable (OEA) is high. When OEA is low or when V
CC
is less than 2.1 V, the A outputs are in the
high-impedance state.
BIAS V
CC
establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when V
CC
is not connected.
BG V
CC
and BG GND are the supply inputs for the bias generator.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
0°C to 70°C TQFP – PCA Tube SN74FB1651PCA FB1651
†
Package drawings, standard packing quantities, thermal data, symbolization, and
PCB design guidelines are available at www.ti.com/sc/package.
Function Tables
TRANSCEIVER
INPUTS
OEA OEA OEB OEB
FUNCTION
X X H L A data to B bus
L HXX B data to A bus
L HHLA data to B bus, B data to A bus
X X L X
X XXH
B-bus isolation
H X X X
X L X X
A-bus isolation
STORAGE MODE
INPUTS
LE CLK
FUNCTION
H X Transparent
L ↑ Store data
L L Storage