Datasheet

SN74GTLPH16945
16-BIT LVTTL-TO-GTLP BUS TRANSCEIVER
SCES292C – OCTOBER 1999 – REVISED SEPTEMBER 2001
3–246
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
This device is fully specified for live-insertion applications using I
off
, power-up 3-state, and BIAS V
CC
. The I
off
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS V
CC
circuitry precharges and preconditions the B-port
input/output connections, preventing disturbance of active data on the backplane during card insertion or
removal, and permits true live-insertion capability.
This GTLP device features TI-OPC circuitry, which actively limits overshoot caused by improperly terminated
backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves
signal integrity, which allows adequate noise margin to be maintained at higher frequencies.
Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, the output-enable (OE
) input should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver.
terminal assignments
123456
A 1DIR NC NC NC NC 1OE
B 1A2 1A1 GND GND 1B1 1B2
C 1A4 1A3 V
CC
BIAS V
CC
1B3 1B4
D 1A6 1A5 GND GND 1B5 1B6
E 2A8 1A7 1B7 1B8
F 2A1 2A2 2B2 2B1
G 2A3 2A4 GND GND 2B4 2B3
H 2A5 2A6 V
CC
V
REF
2B6 2B5
J 2A7 2A8 GND GND 2B8 2B7
K 2DIR NC NC NC NC 2OE
NC – No internal connection
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP – DL Tape and reel SN74GTLPH16945DLR
° °
TSSOP – DGG Tape and reel SN74GTLPH16945GR GTLPH16945
–40
°
C to 85
°
C
TVSOP – DGV Tape and reel SN74GTLPH16945VR GL945
VFBGA – GQL Tape and reel SN74GTLPH16945KR GL945
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
GQL PACKAGE
(TOP VIEW)
A
B
C
D
E
F
G
H
J
K
123456