Datasheet

SN74GTLPH16916
17-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
WITH BUFFERED CLOCK OUTPUTS
SCES347B – JANUARY 2001 – REVISED AUGUST 2001
3–241
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
live-insertion specifications for B port over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN MAX UNIT
I
off
V
CC
= 0, BIAS V
CC
= 0, V
I
or V
O
= 0 to 1.5 V 10 µA
I
OZPU
V
CC
= 0 to 1.5 V, BIAS V
CC
= 0, V
O
= 0.5 V to 1.5 V, OE = 0 ±30 µA
I
OZPD
V
CC
= 1.5 V to 0, BIAS V
CC
= 0, V
O
= 0.5 V to 1.5 V, OE = 0 ±30 µA
V
CC
= 0 to 3.15 V 5 mA
I
CC
(BIAS V
CC
)
V
CC
= 3.15 V to 3.45 V
BIAS V
CC
= 3.15 V to 3.45 V, V
O
(B port) = 0 to 1.5 V
10 µA
V
O
V
CC
= 0, BIAS V
CC
= 3.3 V, I
O
= 0 0.95 1.05 V
I
O
V
CC
= 0, BIAS V
CC
= 3.15 V to 3.45 V, V
O
(B port) = 0.6 V –1 µA
timing requirements over recommended ranges of supply voltage and operating free-air
temperature, V
TT
= 1.5 V and V
REF
= 1 V for GTLP (unless otherwise noted)
MIN MAX UNIT
f
clock
Clock frequency CLKAB to B or CLKBA to A 175 MHz
LEAB or LEBA high 2.8
t
w
Pulse duration
CLKAB to B or CLKBA to A
High or low 2.8
ns
A before CLKAB↑ 1.8
B before CLKBA↑ 1.5
A before LEAB↓ 1
t
su
Setup time
B before LEBA↓
2
ns
CEAB before CLKAB↑ 1.5
CEBA before CLKBA↑ 1.4
A after CLKAB↑ 0.3
B after CLKBA↑ 0.4
A after LEAB↓ 1.1
t
h
Hold time
B after LEBA↓
0.4
ns
CEAB after CLKAB↑ 1
CEBA after CLKBA↑ 1