Datasheet

SN74GTLPH1655
16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE
UNIVERSAL BUS TRANSCEIVER
SCES294C – OCTOBER 1999 – REVISED AUGUST 2001
3–139
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic) (continued)
1D
C1
CLK
1D
C1
CLK
2B1
2OEAB
CLK
2LEAB
2LEBA
2OEBA
2A1
31
64
35
34
32
17
48
To Seven Other Channels
OE
33
ERC
61
V
REF
41