Datasheet

SN74GTLPH1655
16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE
UNIVERSAL BUS TRANSCEIVER
SCES294C – OCTOBER 1999 REVISED AUGUST 2001
3–135
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Member of Texas Instruments Widebus
Family
D UBT Transceiver Combines D-Type
Latches and D-Type Flip-Flops for
Operation in Transparent, Latched, or
Clocked Mode
D TI-OPC Circuitry Limits Ringing on
Unevenly Loaded Backplanes
D OEC Circuitry Improves Signal Integrity
and Reduces Electromagnetic Interference
D Bidirectional Interface Between GTLP
Signal Levels and LVTTL Logic Levels
D Partitioned as Two 8-Bit Transceivers With
Individual Latch Timing and Output
Control, but With a Common Clock
D LVTTL Interfaces Are 5-V Tolerant
D High-Drive GTLP Outputs (100 mA)
D LVTTL Outputs (24 mA/24 mA)
D Variable Edge-Rate Control (ERC) Input
Selects GTLP Rise and Fall Times for
Optimal Data-Transfer Rate and Signal
Integrity in Distributed Loads
D I
off
, Power-Up 3-State, and BIAS V
CC
Support Live Insertion
D Bus Hold on A-Port Data Inputs
D Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description
The SN74GTLPH1655 is a high-drive, 16-bit UBT transceiver that provides LVTTL-to-GTLP and
GTLP-to-LVTTL signal-level translation. It is partitioned as two 8-bit transceivers and allows for transparent,
latched, and clocked modes of data transfer. The device provides a high-speed interface between cards
operating at LVTTL logic levels and a backplane operating at GTLP signal levels. High-speed (about three times
faster than standard LVTTL or TTL) backplane operation is a direct result of GTLPs reduced output swing
(<1 V), reduced input threshold levels, improved differential input, OEC circuitry, and TI-OPC circuitry.
Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have been designed and tested using
several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with
equivalent load impedance down to 11 .
Copyright 2001, Texas Instruments Incorporated
OEC, TI, TI-OPC, UBT, and Widebus are trademarks of Texas Instruments.
DGG PACKAGE
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1OEAB
1OEBA
V
CC
1A1
GND
1A2
1A3
GND
1A4
GND
1A5
GND
1A6
1A7
V
CC
1A8
2A1
GND
2A2
2A3
GND
2A4
2A5
GND
2A6
GND
2A7
V
CC
2A8
GND
2OEAB
2OEBA
CLK
1LEAB
1LEBA
ERC
GND
1B1
1B2
GND
1B3
1B4
1B5
GND
1B6
1B7
V
CC
1B8
2B1
GND
2B2
2B3
GND
2B4
2B5
V
REF
2B6
GND
2B7
2B8
BIAS V
CC
2LEAB
2LEBA
OE
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.