Datasheet

SN74GTLPH3245
32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SCES291C – OCTOBER 1999 – REVISED AUGUST 2001
3–132
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1
Open
GND
500 Ω
500 Ω
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
Open
6 V
GND
t
PLH
t
PHL
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
V
OH
V
OL
0 V
V
OL
+ 0.3 V
V
OH
– 0.3 V
≈0 V
Input
3 V
3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
Output
1.5 V
Test
Point
C
L
= 30 pF
(see Note A)
From Output
Under Test
12.5 Ω
LOAD CIRCUIT FOR B OUTPUTS
0 V
V
OH
V
OL
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
Output
1.5 V
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≈ 10 MHz, Z
O
= 50 Ω, t
r
≈ 2 ns, t
f
≈ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
6 V
t
PLH
t
PHL
1.5 V 1.5 V
1.5 V
1.5 V
1.5 V
1.5 V 1.5 V
1.5 V
1 V 1 V
1 V 1 V
Figure 1. Load Circuits and Voltage Waveforms
PRODUCT PREVIEW