Datasheet

SN74GTLPH3245
32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SCES291C – OCTOBER 1999 REVISED AUGUST 2001
3–127
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagram (positive logic) (continued)
3DIR
3OE
3A1
3B1
2V
REF
4DIR
4OE
4A1
4B1
To Seven Other Channels
2ERC
2V
CC
and 2BIAS V
CC
are associated with these channels.
To Seven Other Channels
L3
R1
K2
W3
T2
L4
K5
R6
W4
T5
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