Datasheet

SN74GTLPH1645
16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SCES290D – OCTOBER 1999 – REVISED SEPTEMBER 2001
3–115
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional description
The SN74GTLPH1645 is a high-drive (100 mA), 16-bit bus transceiver partitioned as two 8-bit segments and
is designed for asynchronous communication between data buses. The device transmits data from the A port
to the B port or from the B port to the A port, depending on the logic level at the direction-control (DIR) input.
OE
can be used to disable the device so the buses are effectively isolated. Data polarity is noninverting.
For A-to-B data flow, when OE is low and DIR is high, the B outputs take on the logic value of the A inputs. When
OE
is high, the outputs are in the high-impedance state.
The data flow for B to A is similar to A to B, except OE
and DIR are low.
Function Tables
OUTPUT CONTROL
INPUTS
OE DIR
OUTPUT MODE
H X Z Isolation
L L B data to A port
L H A data to B port
True transparent
B-PORT EDGE-RATE CONTROL (ERC)
INPUT ERC
OUTPUT
LOGIC
LEVEL
NOMINAL
VOLTAGE
B-PORT
EDGE RATE
L GND Slow
H
V
CC
Fast