Datasheet

SN74GTLPH1616
17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
WITH BUFFERED CLOCK OUTPUTS
SCES346C– JANUARY 2001 – REVISED AUGUST 2001
3–94
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISTRIBUTED-LOAD BACKPLANE SWITCHING CHARACTERISTICS
The preceding switching characteristics table shows the switching characteristics of the device into a lumped load
(see Figure 1). However, the designer’s backplane application probably is a distributed load. The physical
representation is shown in Figure 2. This backplane, or distributed load, can be approximated closely to a resistor
inductance capacitance (RLC) circuit, as shown in Figure 3. This device has been designed for optimum performance
in this RLC circuit. The following switching characteristics table shows the switching characteristics of the device into
the RLC load, to help the designer better understand the performance of the GTLP device in this typical backplane.
See www.ti.com/sc/gtlp for more information.
Drvr
1.5 V
.25” 1”
1” 1”
1.5 V
1”1”
1” .25”
Rcvr
Rcvr
Rcvr
Figure 2. High-Drive Test Backplane
Slot 1 Slot 2 Slot 19 Slot 20
Conn.
Conn. Conn. Conn.
Z
O
= 50 Ω
22 Ω 22 Ω
From Output
Under Test
Test
Point
1.5 V
C
L
= 18 pF
11 Ω
L
L
= 14 nH
Figure 3. High-Drive RLC Network