Datasheet

GLOSSARY
SYMBOLS, TERMS, AND DEFINITIONS
1–8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
t
PLH
Propagation delay time, low-to-high level output
The time between the specified reference points on the input and output voltage waveforms with the
output changing from the defined low level to the defined high level
t
PLZ
Disable time (of a 3-state output) from low level
The time interval between the specified reference points on the input and the output voltage waveforms
with the 3-state output changing from the defined low level to the high-impedance (off) state
t
PZH
Enable time (of a 3-state output) to high level
The time interval between the specified reference points on the input and output voltage waveforms
with the 3-state output changing from the high-impedance (off) state to the defined high level
t
PZL
Enable time (of a 3-state output) to low level
The time interval between the specified reference points on the input and output voltage waveforms
with the 3-state output changing from the high-impedance (off) state to the defined low level
t
r
Rise time
The time interval between two reference points (10% and 90%, unless otherwise specified) on a
waveform that is changing from the defined low level to the defined high level
t
sk(i)
Input skew
The difference between any two propagation delay times that originate at different inputs and terminate
at a single output. Input skew describes the ability of a device to manipulate (stretch, shrink, or chop)
a clock signal. This is typically accomplished with a multiple-input gate wherein one of the inputs acts
as a controlling signal to pass the clock through. t
sk(i)
describes the ability of the gate to shape the pulse
to the same duration, regardless of the input used as the controlling input.
t
sk(l)
Limit skew
The difference between 1) the greater of the maximum specified values of t
PLH
and t
PHL
and 2) the
lesser of the minimum specified values of t
PLH
and t
PHL
. Limit skew is not directly observed on a device.
It is calculated from the data-sheet limits for t
PLH
and t
PHL
. t
sk(l)
quantifies for the designer how much
variation in propagation delay time is induced by operation over the entire ranges of supply voltage,
temperature, output load, and other specified operating conditions. Specified as such, t
sk(l)
also
accounts for process variation. In fact, all other skew specifications [t
sk(o)
, t
sk(i)
, t
sk(p)
, and t
sk(pr)
] are
subsets of t
sk(l)
; they are never greater than t
sk(l)
.
t
sk(o)
Output skew
The skew between specified outputs of a single logic device with all driving inputs connected together
and the outputs switching in the same direction while driving identical specified loads
t
sk(p)
Pulse skew
The magnitude of the time difference between the propagation delay times, t
PHL
and t
PLH
, when a single
switching input causes one or more outputs to switch
t
sk(pr)
Process skew
The magnitude of the difference in propagation delay times between corresponding terminals of two
logic devices when both logic devices operate with the same supply voltages, operate at the same
temperature, and have identical package styles, identical specified loads, identical internal logic
functions, and the same manufacturer