Datasheet

SN74GTLP1395
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
SCES349B – JUNE 2001 – REVISED AUGUST 2001
3–47
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DISTRIBUTED-LOAD BACKPLANE SWITCHING CHARACTERISTICS
The preceding switching characteristics table shows the switching characteristics of the device into a lumped load
(Figure 1). However, the designer’s backplane application probably is a distributed load. The physical representation
is shown in Figure 2. This backplane, or distributed load, can be approximated closely to a resistor inductance
capacitance (RLC) circuit, as shown in Figure 3. This device has been designed for optimum performance in this RLC
circuit. The following switching characteristics table shows the switching characteristics of the device into the RLC
load, to help the designer better understand the performance of the GTLP device in the backplane. See
www.ti.com/sc/gtlp for more information.
Drvr
1.5 V
.25” 1”
1” 1”
1.5 V
1”1”
1” .25”
Rcvr
Rcvr
Rcvr
Figure 2. High-Drive Test Backplane
Slot 1 Slot 2 Slot 19 Slot 20
Conn.
Conn. Conn. Conn.
Z
O
= 50 Ω
22 Ω 22 Ω
From Output
Under Test
Test
Point
1.5 V
C
L
= 18 pF
11 Ω
L
L
= 14 nH
Figure 3. High-Drive RLC Network
switching characteristics over recommended operating conditions for the bus transceiver
function (unless otherwise noted) (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
EDGE RATE
†
TYP
‡
UNIT
t
PLH
t
PHL
A B Slow ns
t
PLH
t
PHL
A B Fast ns
t
PLH
t
PHL
A Y Slow ns
t
PLH
t
PHL
A Y Fast ns
Slow
t
r
Rise time, B outputs (20% to 80%)
Fast
ns
Slow
t
f
Fall time, B outputs (80% to 20%)
Fast
ns
†
Slow (ERC = H) and Fast (ERC = L)
‡
All typical values are at V
CC
= 3.3 V, T
A
= 25°C. All values are derived from TI SPICE models.
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