Datasheet

SN74GTLP1395
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
SCES349B – JUNE 2001 – REVISED AUGUST 2001
3–45
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
skew characteristics over recommended ranges of supply voltage and operating free-air
temperature, V
REF
= 1 V, standard lumped loads (C
L
= 30 pF for B port and C
L
= 50 pF for Y port)
(unless otherwise noted)(see Figure 1)
†
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
EDGE RATE
‡
MIN TYP
§
MAX UNIT
t
sk(LH)
¶
t
sk(HL)
¶
A B Slow ns
t
sk(LH)
¶
t
sk(HL)
¶
A B Fast ns
t
sk(LH)
¶
t
sk(HL)
¶
B Y ns
Slow ns
t
sk(t)
¶
A B
Fast ns
B Y ns
t
sk(prLH)
#
t
sk(prHL)
#
A B Slow ns
t
sk(prLH)
#
t
sk(prHL)
#
A B Fast ns
t
sk(prLH)
#
t
sk(prHL)
#
B Y ns
†
Actual skew values between GTLP outputs could vary on the backplane due to the loading and impedance seen by the device.
‡
Slow (ERC = L) and Fast (ERC = H)
§
All typical values are at V
CC
= 3.3 V, T
A
= 25°C.
¶
t
sk(LH)
/t
sk(HL)
and t
sk(t)
– Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all
outputs with the same packaged device. The specifications are given for specific worst-case V
CC
and temperature and apply to any outputs
switching in the same direction either high to low [t
sk(HL)
] or low to high [t
sk(LH)
] or in opposite directions, both low to high and high to low [t
sk(t)
].
#
t
sk(prLH)
/t
sk(prHL)
– The magnitude of the difference in propagation delay times between corresponding terminals of two logic devices when both
logic devices operate with the same supply voltages and at the same temperature, and have identical package types, identical specified loads,
and identical logic functions. Furthermore, these values are provided by SPICE simulations.
PRODUCT PREVIEW