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APPLICATION INFORMATION
Bidirectional Translation
GTL2010
10-BIT BIDIRECTIONAL LOW-VOLTAGE TRANSLATOR
SCDS221 – SEPTEMBER 2006
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the G
REF
input must be connected to D
REF
and both pins pulled to HIGH-side V
CC
through a pullup resistor
(typically 200 k Ω ). A filter capacitor on D
REF
is recommended. The processor output can be totem pole or open
drain (pullup resistors) and the chipset output can be totem pole or open drain (pullup resistors are required to
pull the Dn outputs to V
CC
). However, if either output is totem pole, data must be unidirectional or the outputs
must be 3-statable, and the outputs must be controlled by some direction-control mechanism to prevent
HIGH-to-LOW contentions in either direction. If both outputs are open drain, no direction control is needed. The
opposite side of the reference transistor (S
REF
) is connected to the processor core power-supply voltage. When
D
REF
is connected through a 200-k Ω resistor to a 3.3-V to 5.5-V V
CC
supply and S
REF
is set between 1 V to V
CC
1.5 V, the output of each Sn has a maximum output voltage equal to S
REF
, and the output of each Dn has a
maximum output voltage equal to V
CC
.
8
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