Datasheet

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PARAMETER MEASUREMENT INFORMATION
t
h
t
su
From Output
Under Test
C
L
= 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1
6 V
Open
GND
500 Ω
500 Ω
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
Open
6 V
GND
t
PLH
t
PHL
Output
Control
(see Note B)
Output
Waveform 1
S1 at 6 V
(see Note C)
Output
Waveform 2
S1 at GND
(see Note C)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
3 V
0 V
V
REF
V
REF
V
TT
V
OL
0 V
V
OL
+ 0.3 V
V
OH
− 0.3 V
≈0 V
3 V
0 V
0 V
3 V
0 V
V
M
V V
M
V
t
w
Input
(see Note B)
3 V
3 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
(1)
VOLTAGE WAVEFORMS
PULSE DURATION
(V
M
= 1.5 V for A port and V
REF
for B port)
(1)
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
Timing
Input
Data Input
A Port
Output
Input
V
TT
Test
Point
C
L
= 30 pF
(see Note A)
From Output
Under Test
25 Ω
LOAD CIRCUIT FOR B OUTPUTS
t
PLH
t
PHL
0 V
V
OH
V
OL
Input
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
(1)
Output
V
TT
V
REF
V
REF
V
REF
V
REF
0 V
V
TT
Data Input
B Port
(1)
All control inputs are TTL levels.
NOTES: A. C
L
includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z
O
= 50 Ω, t
r
≤ 2.5 ns, t
f
≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
D. The outputs are measured one at a time, with one transition per measurement.
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
SN54GTL16612, SN74GTL16612
18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS
SCBS480K – JUNE 1994 – REVISED JULY 2005
V
TT
= 1.2 V, V
REF
= 0.8 V for GTL and V
TT
= 1.5 V, V
REF
= 1 V for GTL+
Figure 1. Load Circuits and Voltage Waveforms
8