Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Multiplexer, demux FET multiplexer/demultiplexer Single supply TSSOP 16

1B1

1B2

2B1

2B2

GND

4B1

4B2

3B1

3B2

1B2

1B1

SEL

3B2

3B1

2B1

VCC

OEB

4B1

4B2

2B2

GND

1 16

8 9

4B1

4B2

3B1

3B2

1B1

1B2

2B1

2B2

GND

SN74CBTLV3257

www.ti.com

SCDS040J –DECEMBER 1997–REVISED JANUARY 2013

Low-Voltage 4-Bit 1-of-2 FET Multiplexer/Demultiplexer

Check for Samples: SN74CBTLV3257

FEATURES

RGY PACKAGE

• 5-Ω Switch Connection Between Two Ports

(TOP VIEW)

• Rail-to-Rail Switching on Data I/O Ports

• Ioff Supports Partial-Power-Down Mode

Operation

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

D, DBQ, DGV, OR PW PACKAGE

RSV PACKAGE

(TOP VIEW)

DESCRIPTION

The SN74CBTLV3257 is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance of

the switch allows connections to be made with minimal propagation delay.

The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the output-

enable (OE) input is high.

This device is fully specified for partial-power-down applications using I

off

. The Ioff feature ensures that damaging

current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

QFN – RSV Reel of 3000 SN74CBTLV3257RSVR ZTR

QFN – RGY Reel of 3000 SN74CBTLV3257RGYR CL257

Tube of 40 SN74CBTLV3257D

SOIC – D CBTLV3257

–40°C to 85°C Reel of 2500 SN74CBTLV3257DR

SSOP (QSOP) – DBQ Reel of 2500 SN74CBTLV3257DBQR CL257

TSSOP – PW Reel of 2000 SN74CBTLV3257PWR CL257

TVSOP – DGV Reel of 2000 SN74CBTLV3257DGVR CL257

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

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SN74CBTLV3257 www.ti.
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SN74CBTLV3257 SCDS040J – DECEMBER 1997 – REVISED JANUARY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Table 1.
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SN74CBTLV3257 www.ti.com SCDS040J – DECEMBER 1997 – REVISED JANUARY 2013 SIMPLIFIED SCHEMATIC, EACH FET SWITCH A B (OE) ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE VCC VI MIN MAX Supply voltage range –0.5 4.6 (2) –0.5 Input voltage range Continuous channel current IIK Input clamp current (VI/O < 0) D package θJA Package thermal impedance (3) (1) (2) (3) (4) V 4.
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SN74CBTLV3257 SCDS040J – DECEMBER 1997 – REVISED JANUARY 2013 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 3 V, II = −18 mA II VCC = 3.6 V, VI Ioff VCC = 0, ICC VCC = 3.6 V, VCC = 3.6 V, ∆ICC (2) Ci Cio(OFF) Control inputs A port B port TYP (1) MAX UNIT −1.2 V ±1 µA VI or VO = 0 to 3.
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SN74CBTLV3257 www.ti.com SCDS040J – DECEMBER 1997 – REVISED JANUARY 2013 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND RL CL VCC 2.5 V ± 0.2 V 3.3 V ± 0.3 V 30 pF 50 pF LOAD CIRCUIT V∆ 0.15 V 0.
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SN74CBTLV3257 SCDS040J – DECEMBER 1997 – REVISED JANUARY 2013 www.ti.com REVISION HISTORY Changes from Revision I (OCTOBER 2003) to Revision J • 6 Page Added QFN ordering info and package pinout .....................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 10-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 5.6 1.6 8.0 12.0 Q1 74CBTLV3257PWRG4 TSSOP PW 16 2000 330.0 12.4 6.9 SN74CBTLV3257DGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74CBTLV3257DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 10-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74CBTLV3257PWRG4 SN74CBTLV3257DGVR TSSOP PW 16 2000 367.0 367.0 35.0 TVSOP DGV 16 2000 367.0 367.0 35.0 SN74CBTLV3257DR SOIC D 16 2500 333.2 345.9 28.6 SN74CBTLV3257PWR TSSOP PW 16 2000 364.0 364.0 27.0 SN74CBTLV3257RGYR VQFN RGY 16 3000 367.0 367.0 35.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.