Datasheet

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PARAMETER MEASUREMENT INFORMATION
V
OH
V
OL
FromOutput
UnderTest
C =50pF
L
(seeNote A)
LOADCIRCUIT
S1
7V
Open
GND
500 W
500 W
t
PLH
t
PHL
Output
Control
(low-level
enabling)
Output
Waveform1
S1at7V
(seeNoteB)
Output
Waveform2
S1atOpen
(seeNoteB)
t
PZL
t
PZH
t
PLZ
t
PHZ
3V
0V
V
OH
V
OL
0V
V +0.3V
OL
V 0.3V
OH
-
0V
Input
3V
3.5V
VOLTAGEWAVEFORMS
PROPAGATIONDELAY TIMES
VOLTAGEWAVEFORMS
ENABLE ANDDISABLETIMES
Output
t
pd
t /t
PLZ PZL
t /t
PHZ PZH
Open
7V
Open
TEST S1
1.5V 1.5V
1.5V 1.5V
1.5V 1.5V
1.5V
1.5V
NOTES: A.C includesprobeandjigcapacitance.
L
B.Waveform1isforanoutputwithinternalconditionssuchthattheoutputislow,exceptwhendisabledbytheoutputcontrol.
C. Allinputpulsesaresuppliedbygeneratorshavingthefollowingcharacteristics:PRR 10Mhz,Z =50 ,t 2.5ns,t 2.5ns.£ W £ £
O r f
D. Theoutputismeasuredwithoneinputtransitionpermeasurement.
E.t andt arethesameast .
PLZ PHZ dis
F.t andt aretheasmeast .
PZL PZH en
G.t andt arethesameast .
PLH PHL pd
Waveform2isforanoutputwithinternalconditionssuchthattheoutputishigh,exceptwhendisabledbytheoutputcontrol.
SN74CBTD1G384
SINGLE FET BUS SWITCH
WITH LEVEL SHIFTING
SCDS066K – JULY 1998 – REVISED JUNE 2006
Figure 1. Load Circuit and Voltage Waveforms
4
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