Datasheet

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FEATURES

1A1

1A2

2A1

2A2

3A1

3A2

GND

4A1

4A2

5A1

5A2

6A1

6A2

7A1

7A2

8A1

GND

8A2

9A1

9A2

10A1

10A2

11A1

11A2

12A1

12A2

1B1

1B2

2B1

2B2

3B1

GND

3B2

4B1

4B2

5B1

5B2

6B1

6B2

7B1

7B2

8B1

GND

8B2

9B1

9B2

10B1

10B2

11B1

11B2

12B1

12B2

DGG OR DGV PACKAGE

(TOP VIEW)

DESCRIPTION/ORDERING INFORMATION

SN74CB3T16212

24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH

WITH 5-V-TOLERANT LEVEL SHIFTER

SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005

• Member of the Texas Instruments Widebus™

Family

• Output Voltage Translation Tracks V

• Supports Mixed-Mode Signal Operation on All

Data I/O Ports

– 5-V Input Down to 3.3-V Output Level Shift

With 3.3-V V

– 5-V/3.3-V Input Down to 2.5-V Output Level

Shift With 2.5-V V

• 5-V-Tolerant I/Os With Device Powered Up or

Powered Down

• Bidirectional Data Flow, With Near-Zero

Propagation Delay

• Low ON-State Resistance (r

) Characteristics

= 5 Ω Typ)

• Low Input/Output Capacitance Minimizes

Loading (C

io(OFF)

= 9 pF Typ)

• Data and Control Inputs Provide Undershoot

Clamp Diodes

• Low Power Consumption (I

= 70 µ A Max)

• V

Operating Range From 2.3 V to 3.6 V

• Data I/Os Support 0-V to 5-V Signaling Levels

(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)

• Control Inputs Can Be Driven by TTL or

5-V/3.3-V CMOS Outputs

• I

off

Supports Partial-Power-Down Mode

Operation

• Latch-Up Performance Exceeds 250 mA Per

JESD 17

• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

• Supports Digital Applications: Level

Translation, PCI Interface, USB Interface,

Memory Interleaving, and Bus Isolation

• Ideal for Low-Power Portable Equipment

The SN74CB3T16212 is a high-speed TTL-compatible FET bus-exchange switch, with low ON-state resistance

), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data

I/O ports by providing voltage translation that tracks V

. The SN74CB3T16212 supports systems using 5-V TTL,

3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (15 pages)

PAGE 1
www.ti.com SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER FEATURES • • • • • • • • • • • • • • • • • Member of the Texas Instruments Widebus™ Family Output Voltage Translation Tracks VCC Supports Mixed-Mode Signal Operation on All Data I/O Ports – 5-V Input Down to 3.3-V Output Level Shift With 3.3-V VCC – 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.
PAGE 2
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005 VCC 5.5 V VCC IN VCC − 1 V OUT VCC VCC − 1 V CB3T 0V 0V Input Voltages Output Voltages NOTE: If the input high-voltage (VIH) level is greater than or equal to VCC − 1 V and less than or equal to 5.5 V, the output high-voltage (VOH) level is equal to approximately the VCC voltage level. Figure 1.
PAGE 3
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.
PAGE 4
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.
PAGE 5
www.ti.com SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005 SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW) A B VG (see Note A) Control Circuit EN (see Note B) A. Gate voltage (VG) is equal to approximately VCC + VT when the switch is ON and VI > VCC + VT. B. EN is the internal enable signal applied to the switch.
PAGE 6
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005 ELECTRICAL CHARACTERISTICS (1) PARAMETER TEST CONDITIONS VIK VCC = 3 V, II = –18 mA VOH See Figures 3 and 4 Control inputs IIN TYP (2) MIN VCC = 3.6 V, VIN = 3.6 V to 5.5 V or GND MAX UNIT –1.2 V ±10 µA VI = VCC – 0.7 V to 5.5 V ±20 VI = 0.7 V to VCC – 0.7 V –40 II VCC = 3.
PAGE 7
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005 PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT 2 × VCC Input Generator 50 Ω RL TEST VCC S1 RL VI CL tpd(s) 2.5 V ± 0.2 V 3.3 V ± 0.3 V Open Open 500 Ω 500 Ω 3.6 V or GND 5.5 V or GND 30 pF 50 pF tPLZ/tPZL 2.5 V ± 0.2 V 3.3 V ± 0.
PAGE 8
SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS157A – OCTOBER 2003 – REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs INPUT VOLTAGE OUTPUT VOLTAGE vs INPUT VOLTAGE 4.0 VCC = 2.3 V IO = 1 µA TA = 25°C 3.0 V − Output Voltage − V O V − Output Voltage − V O 4.0 2.0 1.0 0.0 VCC = 3 V IO = 1 µA TA = 25°C 3.0 2.0 1.0 0.0 0.0 1.0 2.0 4.0 3.0 VI − Input Voltage − V 6.0 5.0 0.0 1.0 2.0 3.0 4.0 5.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74CB3T16212DGGR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1 SN74CB3T16212DGVR TVSOP DGV 56 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.0 Q1 SN74CB3T16212ZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74CB3T16212DGGR TSSOP DGG 56 2000 367.0 367.0 45.0 SN74CB3T16212DGVR TVSOP DGV 56 2000 367.0 367.0 45.0 SN74CB3T16212ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 336.6 336.6 28.
PAGE 13
PAGE 14
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 15
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.