Datasheet

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2B1
1B1
2A
1A
S0
S1
1OE
2OE
1B2
1B3
1B4
2B2
2B3
2B4
SW
SW
SW
SW
SW
SW
SW
SW
7
9
14
2
1
15
6
5
4
3
10
11
12
13
A
EN
(1)
B
(1) EN is the internal enable signal applied to the switch.
Charge
Pump
V
CC
SN74CB3Q3253
DUAL 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS145A – OCTOBER 2003 – REVISED MARCH 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
3