Datasheet

SN54BCT8240A, SN74BCT8240A
SCAN TEST DEVICES
WITH OCTAL INVERTING BUFFERS
SCBS067E – FEBRUARY 1990 – REVISED DECEMBER 1996
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
R1
C
L
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
R1
S1
7 V (t
PZL
, t
PLZ
, O.C.)
Open
(all others)
From Output
Under Test
Test
Point
R2
C
L
(see Note A)
R
L
= R1 = R2
1.5 V
1.5 V
1.5 V
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing Input
Data Input
1.5 V
1.5 V
3 V
3 V
0 V
0 V
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
1.5 V
t
PHL
t
PLH
t
PLH
t
PHL
Input
Out-of-Phase
Output
1.5 V 1.5 V
1.5 V1.5 V
1.5 V 1.5 V
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
t
PHZ
t
PLZ
0.3 V
t
PZL
t
PZH
1.5 V1.5 V
1.5 V
1.5 V
3 V
0 V
Output
Control
(low-level enable)
Waveform 1
(see Note B)
Waveform 2
(see Note B)
0 V
V
OH
V
OL
3.5 V
0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, t
r
= t
f
≤ 2.5 ns, duty cycle = 50%.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
Figure 9. Load Circuits and Voltage Waveforms