Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SOIC 20

SN54BCT541, SN74BCT541A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS011E – JULY 1988 – REVISED MARCH 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Operating Voltage Range of 4.5 V to 5.5 V

State-of-the-Art BiCMOS Design

Significantly Reduces I

CCZ

3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

P-N-P Inputs Reduce DC Loading

Data Flow-Through Pinout (All Inputs on

Opposite Side From Outputs)

SN54BCT541 ...FK PACKAGE

(TOP VIEW)

SN54BCT541 ...J OR W PACKAGE

SN74BCT541A ...DW, N, OR NS PACKAGE

(TOP VIEW)

OE1

GND

OE2

3212019

910111213

OE1

OE2

GND

description/ordering information

The SN54BCT541 and SN74BCT541A octal buffers and line drivers are ideal for driving bus lines or buffering

memory-address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate

printed-circuit-board layout.

The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2)

input is high, all eight outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE

should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74BCT541AN SN74BCT541AN

Cto70

SOIC DW

Tube SN74BCT541ADW

BCT541A

0°C

70°C

SOIC

–

Tape and reel SN74BCT541ADWR

BCT541A

SOP – NS Tape and reel SN74BCT541ANSR BCT541A

CDIP – J Tube SNJ54BCT541J SNJ54BCT541J

–55°C to 125°C

CFP – W Tube SNJ54BCT541W SNJ54BCT541W

LCCC – FK Tube SNJ54BCT541FK SNJ54BCT541FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011E – JULY 1988 – REVISED MARCH 2003 D D D Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) SN54BCT541 . . . J OR W PACKAGE SN74BCT541A . . .
PAGE 2
SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011E – JULY 1988 – REVISED MARCH 2003 FUNCTION TABLE INPUTS A OUTPUT Y OE1 OE2 L L L L L L H H H X X Z X H X Z logic diagram (positive logic) OE1 OE2 A1 1 19 2 18 Y1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011E – JULY 1988 – REVISED MARCH 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54BCT541 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V MIN II = –18 mA IOH = –3 mA SN74BCT541A TYP† MAX MIN –1.2 2.4 3.3 2 3.2 IOH = –12 mA IOH = –15 mA –1.2 2.4 V 3.3 V 2 0.38 UNIT 3.1 VOL VCC = 4 4.5 5V IOL = 48 mA IOL = 64 mA 0.55 II IIH VCC = 5.
PAGE 4
SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS011E – JULY 1988 – REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION 7 V (tPZL, tPLZ, O.C.) S1 Open (all others) From Output Under Test Test Point CL (see Note A) R1 From Output Under Test R1 Test Point CL (see Note A) R2 LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS RL = R1 = R2 LOAD CIRCUIT FOR 3-STATE AND OPEN-COLLECTOR OUTPUTS High-Level Pulse (see Note B) 3V Timing Input (see Note B) 3V 1.5 V 1.5 V 0V 1.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74BCT541ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74BCT541ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74BCT541ADWR SOIC DW 20 2000 346.0 346.0 41.0 SN74BCT541ANSR SO NS 20 2000 346.0 346.0 41.
PAGE 9
MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.
PAGE 10
PAGE 11
PAGE 12
PAGE 13
PAGE 14
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 26-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74BCT541ADBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74BCT541ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 SN74BCT541ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 26-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74BCT541ADBR SSOP DB 20 2000 367.0 367.0 38.0 SN74BCT541ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74BCT541ANSR SO NS 20 2000 367.0 367.0 45.
PAGE 20
PAGE 21
PAGE 22
PAGE 23
PAGE 24
PAGE 25
PAGE 26
PAGE 27
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 28
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.