Datasheet

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
SCBS059B − MARCH 1989 − REVISED NOVEMBER 1993
Copyright 1993, Texas Instruments Incorporated
2−1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
BiCMOS Design Substantially Reduces
Standby Current
Two Independent 2-Line to 4-Line Decoders
or One 3-Line to 8-Line Decoder
Separate Enable Inputs for Easy Cascading
Two Supply Voltage Terminals (V
CC
and
V
bat
)
Built-In Supply-Voltage Monitor for V
CC
Automatic Cut Off of Outputs During
V
CC
Fail
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
description
The SN74BCT2414 is a decoder specially designed to be used in memory systems with battery backup during
power failure. The two independent 2-line to 4-line decoders with separate and common control inputs may be
externally cascaded to implement a 3-line to 8-line decoder.
The circuit has two supply voltage inputs: the voltage monitor (bandgap) is powered via the V
CC
terminal; the
internal logic of the circuit is powered via the V
bat
terminal. In case V
CC
drops below 3.65 V (nominal), the voltage
monitor forces the voltage-control (VS) and decoder outputs (Y) to the high level. VS may be used to disconnect
the supply voltage of the memories (V
bat
) from the system supply. This output is switched off when the on-chip
supply voltage monitor detects a power failure.
The SN74BCT2414 is characterized for operation from 0°C to 70°C.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VS
SD
1A
2A
1B
2B
1G
2G
G
GND
V
CC
V
bat
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
DW OR N PACKAGE
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