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SCES589B − AUGUST 2004 − REVISED APRIL 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Member of the Texas Instruments

Widebus+ Family

D Control Inputs V

Levels Are

Referenced to V

CCA

Voltage

D V

Isolation Feature − If Either V

Input

Is at GND, Both Ports Are in the

High-Impedance State

D Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

D Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.2-V to

3.6-V Power-Supply Range

D I

off

Supports Partial-Power-Down Mode

Operation

D I/Os Are 4.6-V Tolerant

D Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D ESD Protection Exceeds JESD 22

− 8000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The

SN74AVCH32T245 is optimized to operate with V

CCA

CCB

set at 1.4 V to 3.6 V. It is operational with V

CCA

CCB

as low as 1.2 V. The A port is designed to track V

CCA

. V

CCA

accepts any supply voltage from 1.2 V to 3.6 V. The

B port is designed to track V

CCB

. V

CCB

accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal

low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH32T245 is designed for asynchronous communication between data buses. The device

transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE

) input can be used to disable the outputs so the buses are

effectively isolated.

The SN74AVCH32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE

, 2OE, 3OE, and

4OE

) are supplied by V

CCA

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

The V

isolation feature ensures that if either V

input is at GND, then both ports are in the high-impedance

state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE

should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40°C to 85°C

LFBGA − GKE

Tape and reel

SN74AVCH32T245KR

WJ245

−40°C to 85°C

LFBGA − ZKE (Pb-free)

Tape and ree

74AVCH32T245ZKER

WJ245

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus+ is a trademark of Texas Instruments.

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Summary of content (21 pages)

PAGE 1
SCES589B − AUGUST 2004 − REVISED APRIL 2005 D Member of the Texas Instruments D D D D D Ioff Supports Partial-Power-Down Mode Widebus+ Family Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail D
PAGE 2
SCES589B − AUGUST 2004 − REVISED APRIL 2005 GKE OR ZKE PACKAGE (TOP VIEW) 1 2 3 4 5 6 terminal assignments 1 2 3 4 5 6 A A 1B2 1B1 1DIR 1OE 1A1 1A2 B B 1B4 1B3 GND GND 1A3 1A4 C C 1B6 1B5 1A6 D 1B8 1B7 VCCA GND 1A5 D VCCB GND 1A7 1A8 E 2B2 2B1 GND GND 2A1 2A2 E F G H J K L M F 2B4 2B3 2B5 VCCA GND 2A4 2B6 VCCB GND 2A3 G 2A5 2A6 H 2B7 2B8 2DIR 2OE
PAGE 3
SCES589B − AUGUST 2004 − REVISED APRIL 2005 logic diagram (positive logic) 1DIR A3 2DIR A4 1A1 H4 1OE A5 2A1 A2 H3 E5 E2 1B1 To Seven Other Channels 3DIR 2B1 To Seven Other Channels J3 4DIR J4 3A1 2OE T4 3OE J5 4A1 J2 T3 N5 N2 3B1 To Seven Other Channels POST OFFICE BOX 655303 4OE 4B1 To Seven Other Channels • DALLAS, TEXAS 75265 3
PAGE 4
SCES589B − AUGUST 2004 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
PAGE 5
SCES589B − AUGUST 2004 − REVISED APRIL 2005 recommended operating conditions (see Notes 4 through 8) VCCI VCCA VCCB VCCO MIN MAX Supply voltage 1.2 3.6 V Supply voltage 1.2 3.6 V VCCI × 0.65 1.6 1.2 V to 1.95 V High-level input voltage VIH Data inputs (see Note 7) 1.95 V to 2.7 V 2.7 V to 3.6 V VIL Data inputs (see Note 7) VCCI × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.
PAGE 6
SCES589B − AUGUST 2004 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 9 and 10) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = −9 mA IOH = −12 mA 2.3 V 2.3 V 1.75 3V 3V 2.3 IOL = 100 µA IOL = 3 mA 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.
PAGE 7
SCES589B − AUGUST 2004 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 9 and 10) (continued) PARAMETER TEST CONDITIONS VCCA MIN B port A or B ports IOZ# B port A port VI = VCCI or GND, ICCA ICCB ICCA ) ICCB ±5 0 to 3.6 V 0V ±0.1 ±2.5 ±5 OE = VIH 3.6 V 3.6 V ±0.5 ±2.5 ±5 OE = don’t care 0V 3.
PAGE 8
SCES589B − AUGUST 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.
PAGE 9
SCES589B − AUGUST 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.
PAGE 10
SCES589B − AUGUST 2004 − REVISED APRIL 2005 operating characteristics, TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.
PAGE 11
SCES589B − AUGUST 2004 − REVISED APRIL 2005 typical total static power consumption (ICCA + ICCB) Table 1 VCCA VCCB 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 <1 <1 <1 <1 <1 1.2 V <1 <2 <2 <2 <2 2 1.5 V <1 <2 <2 <2 <2 2 1.8 V <1 <2 <2 <2 <2 <2 2.5 V <1 2 <2 <2 <2 <2 3.
PAGE 12
SCES589B − AUGUST 2004 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS 6 6 TA = 25°C VCCA = 1.2 V TA = 25°C VCCA = 1.2 V 5 tPHL − Propagation Delay − ns tPLH − Propagation Delay − ns 5 4 3 2 × + 1 H 0 0 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.
PAGE 13
SCES589B − AUGUST 2004 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS 6 6 TA = 25°C VCCA = 1.8 V tPHL − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 H 0 0 10 20 30 40 50 4 3 2 × + 1 H 0 60 0 10 CL − Load Capacitance − pF 20 6 TA = 25°C VCCA = 2.5 V × TA = 25°C VCCA = 2.
PAGE 14
SCES589B − AUGUST 2004 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 3.3 V TA = 25°C VCCA = 3.3 V 4 3 2 × + 1 H 0 0 10 + 20 30 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 40 50 H VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.
PAGE 15
SCES589B − AUGUST 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V CL RL 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ VTP 0.1 V 0.1 V 0.15 V 0.15 V 0.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AVCH32T245KR LFBGA GKE 96 1000 330.0 24.4 5.7 13.7 2.0 8.0 24.0 Q1 SN74AVCH32T245ZKER LFBGA ZKE 96 1000 330.0 24.4 5.7 13.7 2.0 8.0 24.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AVCH32T245KR LFBGA GKE 96 1000 336.6 336.6 41.3 SN74AVCH32T245ZKER LFBGA ZKE 96 1000 336.6 336.6 41.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.